> src/soc/intel/cannonlake/romstage/fsp_params.c/mainboard_memory_init_params called
means your board isn't overriding mainboard_memory_init_params() -- so all the defaults are being used, which I'm not sure will result in a bootable device. You might want to look at the CML/CFL reference boards, or system76/lemp9 to see how they are set up and then adapt for your board. You'll definitely need to load the SPD somehow for a memory-down config, though I'm not sure how to best obtain it from the stock firmware On Mon, Nov 16, 2020 at 11:36 AM Andy Pont <andy.p...@sdcsystems.com> wrote: > Hello, > > I have some life out of my Comet Lake based board but the debug output > ends with > > FMAP: area RW_MRC_CACHE found @ 420000 (65536 bytes) > MRC: no data in 'RW_MRC_CACHE' > PRMRR disabled by config. > WEAK: > src/soc/intel/cannonlake/romstage/fsp_params.c/mainboard_memory_init_params > > called > FspMemoryInit returned 0x80000007 > FspMemoryInit returned an error! > > The board has all of the memory soldered directly down. The spd.bin > file in the build directory is 0 bytes. Is there a way to extract the > correct SPD information from either the original UEFI firmware or from a > running Linux system? > > -Andy. > _______________________________________________ > coreboot mailing list -- coreboot@coreboot.org > To unsubscribe send an email to coreboot-le...@coreboot.org >
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