Hi Matt, Compared VBT data in pre-OS and OS, the data is identical.
Likely issue due to MMIO registers not configured correctly defined in below spec? https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol10_-_display_0.pdf The LVDS display which is on DDI0 is fine so I could switch to OS and get VBT data. DP/HDMI/DVI on DDI1 in windows is causing the issue. I expect coreboot is filling below mailbox's correctly? INTEL_IGD_OPREGION_MBOX1 MBox1; // Mailbox 1: Public ACPI Methods INTEL_IGD_OPREGION_MBOX2 MBox2; // Mailbox 2: Software SCI Inteface INTEL_IGD_OPREGION_MBOX3 MBox3; // Mailbox 3: BIOS/Driver Communication INTEL_IGD_OPREGION_VBT VBT; // Video BIOS Table (OEM customizable data) Regards Rao On Thu, Aug 12, 2021 at 10:24 AM Rao G <[email protected]> wrote: > Thank you Matt. > > the VBT data in BIOS and VBT data captured in OS if they remain identical > would that mean this problem > is not due to VBT data copied into ACPINVS igd_opregion? > > Attaching VBT data for this platform which is captured from OS > > also Xrandr output on each Video Interface > > On Wed, Aug 11, 2021 at 3:28 PM Matt DeVillier <[email protected]> > wrote: > >> On Wed, Aug 11, 2021 at 5:05 AM Rao G <[email protected]> wrote: >> > >> > Thanks Nico for your response. >> > >> > > am expecting some register should set with eDP as interface and when >> > > display is connected >> > > >> > > any clue why the i915 OS driver was turning off DP display in case 2? >> > I assume the HPD signal doesn't get through to the software. >> > >> > [Rao] >> > You mean I need to check PORT_HOTPLUG_EN and PORT_HOTPLUG_STAT mmio >> offsets for this issue? >> > BIOS display is fine, Windows logo is also seen but there is no signal >> when "windows login" is reached >> >> IME, that's almost always due to incorrect/missing/mismatched VBT data >> in the ACPI opregion/mailbox >> >> > >> > It had similar behaviour w.r.t to ubuntu 18.04, I configured DDI1 to >> "DP with HDMI/DVI" >> > >> > Can this issue be fixed with VBE data configured through BMP or it >> needs a fix from graphics MMIO? >> > >> > Regards >> > Rao >> > >> > On Fri, Jul 30, 2021 at 10:27 PM Nico Huber <[email protected]> wrote: >> >> >> >> On 30.07.21 18:59, Rao G wrote: >> >> > Thanks Nico. >> >> > >> >> > HPD is active , measured the signal >> >> >> >> Is your coreboot port public somewhere? If the hardware is fine, maybe >> >> the firmware isn't? >> >> >> >> > >> >> > Configured Ports >> >> > 1.DDI0- PortB - DP with HDMI/DVI is good in BIOS & OS >> >> > 2.DDI1- PortC - DP with HDMI/DVI is good in BIOS, i915 was turning >> off the >> >> > DP display (Never understood the reason) >> >> >> >> It's very suspicious that these two behave differently. Does the HPD >> >> signal (MMIO read) work for DDI0? >> >> >> >> > >> >> > So configured PortC with eDP >> >> > >> >> > If there is no way BIOS to detect the external display with MMIO >> registers >> >> > when configured as eDP, Can i not turn off the DDI1/Port C at >> runtime in >> >> > BIOS, >> >> >> >> Maybe it's time to switch to an open-source solution? libgfxinit will >> >> probably have the same issue, but it might be possible to get a rather >> >> short delay. >> >> >> >> > am expecting some register should set with eDP as interface and when >> >> > display is connected >> >> > >> >> > any clue why the i915 OS driver was turning off DP display in case 2? >> >> >> >> I assume the HPD signal doesn't get through to the software. >> >> >> >> Nico >> > >> > _______________________________________________ >> > coreboot mailing list -- [email protected] >> > To unsubscribe send an email to [email protected] >> >
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