On 16.09.21 17:29, Andreas Bauer wrote: > May I suggest the best way forward would be to compile coreboot with > debug options and go ahead and flash it. You will find out quickly > where the issues are. Obviously backup your current rom !
Not likely, but you can harm the hardware with such brute-force testing, see about GPIOs below. > I myself am quite new to coreboot, but have been able to sucessfully > flash two yet unsupported boards to coreboot (with some problems > remaining). > > For an initial trial, the steps I took look like this: > > - read vendor bios and extract descriptor.bin and me.bin from it > (util/ifdtool -x vendor.bios) Always good to keep a backup, but you don't need to extract these for coreboot. Just keep them where they are in flash, no need to extract /overwrite anything. > - look through src/mainboard for the most similar board you can > identify (for me, in retrospective, the Intel reference board > was a good choice) > - create a new directory and modify Kconfig* accordingly > - look through devicetree.cb and all *.c files and remove code > not applicable to your board. In general, be careful with > Voltage settings and such. My approach was to remove them when > in doubt. Very important are the GPIO configurations. Plural, as there may be configurations for multiple chips, not just the southbridge. Never copy GPIO config from another board. If you configure a pin as output by accident, you risk a short circuit. Nico _______________________________________________ coreboot mailing list -- [email protected] To unsubscribe send an email to [email protected]
