Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan.
4 new defect(s) introduced to coreboot found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 4 of 4 defect(s) ** CID 1469543: (CONSTANT_EXPRESSION_RESULT) /src/drivers/wwan/fm/acpi_fm350gl.c: 86 in wwan_fm350gl_acpi_method_fhrf() /src/drivers/wwan/fm/acpi_fm350gl.c: 63 in wwan_fm350gl_acpi_method_fhrf() ________________________________________________________________________________________________________ *** CID 1469543: (CONSTANT_EXPRESSION_RESULT) /src/drivers/wwan/fm/acpi_fm350gl.c: 86 in wwan_fm350gl_acpi_method_fhrf() 80 /* cold reset */ 81 acpigen_write_else(); 82 { 83 acpigen_write_if_lequal_op_int(ARG0_OP, RESET_TYPE_COLD); 84 { 85 /* disable source clock */ >>> CID 1469543: (CONSTANT_EXPRESSION_RESULT) >>> "wwan_fm350gl_get_rtd3_method_support(config) | ACPI_PCIE_RP_EMIT_SRCK" >>> is always 1/true regardless of the values of its operand. This occurs as >>> the logical operand of "if". 86 if (wwan_fm350gl_get_rtd3_method_support(config) | 87 ACPI_PCIE_RP_EMIT_SRCK) { 88 acpigen_emit_namestring(acpi_device_path_join( 89 parent_dev, "SRCK")); 90 acpigen_emit_byte(ZERO_OP); 91 } /src/drivers/wwan/fm/acpi_fm350gl.c: 63 in wwan_fm350gl_acpi_method_fhrf() 57 acpigen_write_method_serialized("FHRF", 1); 58 { 59 /* LOCAL0 = PERST# */ 60 acpigen_get_tx_gpio(&config->perst_gpio); 61 acpigen_write_if_lequal_op_int(LOCAL0_OP, 0); 62 { >>> CID 1469543: (CONSTANT_EXPRESSION_RESULT) >>> "wwan_fm350gl_get_rtd3_method_support(config) | ACPI_PCIE_RP_EMIT_L23" >>> is always 1/true regardless of the values of its operand. This occurs as >>> the logical operand of "if". 63 if (wwan_fm350gl_get_rtd3_method_support(config) | 64 ACPI_PCIE_RP_EMIT_L23) { 65 acpigen_emit_namestring(acpi_device_path_join(parent_dev, 66 "DL23")); 67 } 68 /* assert PERST# pin */ ** CID 1469542: (CONSTANT_EXPRESSION_RESULT) /src/soc/intel/common/block/pcie/rtd3/rtd3.c: 418 in pcie_rtd3_acpi_fill_ssdt() /src/soc/intel/common/block/pcie/rtd3/rtd3.c: 430 in pcie_rtd3_acpi_fill_ssdt() /src/soc/intel/common/block/pcie/rtd3/rtd3.c: 378 in pcie_rtd3_acpi_fill_ssdt() /src/soc/intel/common/block/pcie/rtd3/rtd3.c: 390 in pcie_rtd3_acpi_fill_ssdt() /src/soc/intel/common/block/pcie/rtd3/rtd3.c: 427 in pcie_rtd3_acpi_fill_ssdt() /src/soc/intel/common/block/pcie/rtd3/rtd3.c: 384 in pcie_rtd3_acpi_fill_ssdt() ________________________________________________________________________________________________________ *** CID 1469542: (CONSTANT_EXPRESSION_RESULT) /src/soc/intel/common/block/pcie/rtd3/rtd3.c: 418 in pcie_rtd3_acpi_fill_ssdt() 412 413 /* Create OpRegions for MMIO accesses. */ 414 acpigen_write_opregion(&opregion); 415 acpigen_write_field("PXCS", fieldlist, ARRAY_SIZE(fieldlist), 416 FIELD_ANYACC | FIELD_NOLOCK | FIELD_PRESERVE); 417 >>> CID 1469542: (CONSTANT_EXPRESSION_RESULT) >>> "config->ext_pm_support | ACPI_PCIE_RP_EMIT_L23" is always 1/true >>> regardless of the values of its operand. This occurs as the logical operand >>> of "if". 418 if (config->ext_pm_support | ACPI_PCIE_RP_EMIT_L23) { 419 pcie_rtd3_acpi_method_dl23(); 420 pcie_rtd3_acpi_method_l23d(); 421 } 422 423 /* Create the OpRegion to access the ModPHY PG registers (PCH RPs only) */ /src/soc/intel/common/block/pcie/rtd3/rtd3.c: 430 in pcie_rtd3_acpi_fill_ssdt() 424 if (rp_type == PCIE_RP_PCH) 425 write_modphy_opregion(pcie_rp); 426 427 if (config->ext_pm_support | ACPI_PCIE_RP_EMIT_PSD0) 428 pcie_rtd3_acpi_method_pds0(pcie_rp); 429 >>> CID 1469542: (CONSTANT_EXPRESSION_RESULT) >>> "config->ext_pm_support | ACPI_PCIE_RP_EMIT_SRCK" is always 1/true >>> regardless of the values of its operand. This occurs as the logical operand >>> of "if". 430 if (config->ext_pm_support | ACPI_PCIE_RP_EMIT_SRCK) 431 pcie_rtd3_acpi_method_srck(pcie_rp, config); 432 433 /* ACPI Power Resource for controlling the attached device power. */ 434 acpigen_write_power_res("RTD3", 0, 0, power_res_states, ARRAY_SIZE(power_res_states)); 435 /src/soc/intel/common/block/pcie/rtd3/rtd3.c: 378 in pcie_rtd3_acpi_fill_ssdt() 372 pcie_rp = get_pcie_rp_pmc_idx(rp_type, parent); 373 if (pcie_rp < 0) { 374 printk(BIOS_ERR, "%s: Unknown PCIe root port\n", __func__); 375 return; 376 } 377 if (config->disable_l23) { >>> CID 1469542: (CONSTANT_EXPRESSION_RESULT) >>> "config->ext_pm_support | ACPI_PCIE_RP_EMIT_L23" is always 1/true >>> regardless of the values of its operand. This occurs as the logical operand >>> of "if". 378 if (config->ext_pm_support | ACPI_PCIE_RP_EMIT_L23) { 379 printk(BIOS_ERR, "%s: Can not export L23 methods\n", __func__); 380 return; 381 } 382 } 383 if (rp_type != PCIE_RP_PCH) { /src/soc/intel/common/block/pcie/rtd3/rtd3.c: 390 in pcie_rtd3_acpi_fill_ssdt() 384 if (config->ext_pm_support | ACPI_PCIE_RP_EMIT_PSD0) { 385 printk(BIOS_ERR, "%s: Can not export PSD0 method\n", __func__); 386 return; 387 } 388 } 389 if (config->srcclk_pin == 0) { >>> CID 1469542: (CONSTANT_EXPRESSION_RESULT) >>> "config->ext_pm_support | ACPI_PCIE_RP_EMIT_SRCK" is always 1/true >>> regardless of the values of its operand. This occurs as the logical operand >>> of "if". 390 if (config->ext_pm_support | ACPI_PCIE_RP_EMIT_SRCK) { 391 printk(BIOS_ERR, "%s: Can not export SRCK method\n", __func__); 392 return; 393 } 394 } 395 /src/soc/intel/common/block/pcie/rtd3/rtd3.c: 427 in pcie_rtd3_acpi_fill_ssdt() 421 } 422 423 /* Create the OpRegion to access the ModPHY PG registers (PCH RPs only) */ 424 if (rp_type == PCIE_RP_PCH) 425 write_modphy_opregion(pcie_rp); 426 >>> CID 1469542: (CONSTANT_EXPRESSION_RESULT) >>> "config->ext_pm_support | ACPI_PCIE_RP_EMIT_PSD0" is always 1/true >>> regardless of the values of its operand. This occurs as the logical operand >>> of "if". 427 if (config->ext_pm_support | ACPI_PCIE_RP_EMIT_PSD0) 428 pcie_rtd3_acpi_method_pds0(pcie_rp); 429 430 if (config->ext_pm_support | ACPI_PCIE_RP_EMIT_SRCK) 431 pcie_rtd3_acpi_method_srck(pcie_rp, config); 432 /src/soc/intel/common/block/pcie/rtd3/rtd3.c: 384 in pcie_rtd3_acpi_fill_ssdt() 378 if (config->ext_pm_support | ACPI_PCIE_RP_EMIT_L23) { 379 printk(BIOS_ERR, "%s: Can not export L23 methods\n", __func__); 380 return; 381 } 382 } 383 if (rp_type != PCIE_RP_PCH) { >>> CID 1469542: (CONSTANT_EXPRESSION_RESULT) >>> "config->ext_pm_support | ACPI_PCIE_RP_EMIT_PSD0" is always 1/true >>> regardless of the values of its operand. This occurs as the logical operand >>> of "if". 384 if (config->ext_pm_support | ACPI_PCIE_RP_EMIT_PSD0) { 385 printk(BIOS_ERR, "%s: Can not export PSD0 method\n", __func__); 386 return; 387 } 388 } 389 if (config->srcclk_pin == 0) { ** CID 1469541: (CONSTANT_EXPRESSION_RESULT) /src/drivers/wwan/fm/acpi_fm350gl.c: 119 in wwan_fm350gl_acpi_method_shrf() /src/drivers/wwan/fm/acpi_fm350gl.c: 134 in wwan_fm350gl_acpi_method_shrf() /src/drivers/wwan/fm/acpi_fm350gl.c: 113 in wwan_fm350gl_acpi_method_shrf() ________________________________________________________________________________________________________ *** CID 1469541: (CONSTANT_EXPRESSION_RESULT) /src/drivers/wwan/fm/acpi_fm350gl.c: 119 in wwan_fm350gl_acpi_method_shrf() 113 if (wwan_fm350gl_get_rtd3_method_support(config) | 114 ACPI_PCIE_RP_EMIT_PSD0) { 115 acpigen_emit_namestring(acpi_device_path_join(parent_dev, 116 "PSD0")); 117 } 118 /* call rtd3 method to Enable SRC Clock. */ >>> CID 1469541: (CONSTANT_EXPRESSION_RESULT) >>> "wwan_fm350gl_get_rtd3_method_support(config) | ACPI_PCIE_RP_EMIT_SRCK" >>> is always 1/true regardless of the values of its operand. This occurs as >>> the logical operand of "if". 119 if (wwan_fm350gl_get_rtd3_method_support(config) | 120 ACPI_PCIE_RP_EMIT_SRCK) { 121 acpigen_emit_namestring(acpi_device_path_join(parent_dev, 122 "SRCK")); 123 acpigen_emit_byte(ONE_OP); 124 } /src/drivers/wwan/fm/acpi_fm350gl.c: 134 in wwan_fm350gl_acpi_method_shrf() 128 /* De-assert RESET# GPIO. */ 129 acpigen_disable_tx_gpio(&config->reset_gpio); 130 acpigen_write_sleep(FM350GL_TB2R); 131 /* De-assert PERST# GPIO. */ 132 acpigen_disable_tx_gpio(&config->perst_gpio); 133 /* Call rtd3 method to trigger L2/L3 ready exit flow in root port */ >>> CID 1469541: (CONSTANT_EXPRESSION_RESULT) >>> "wwan_fm350gl_get_rtd3_method_support(config) | ACPI_PCIE_RP_EMIT_L23" >>> is always 1/true regardless of the values of its operand. This occurs as >>> the logical operand of "if". 134 if (wwan_fm350gl_get_rtd3_method_support(config) | 135 ACPI_PCIE_RP_EMIT_L23) { 136 acpigen_emit_namestring(acpi_device_path_join(parent_dev, 137 "L23D")); 138 } 139 acpigen_write_sleep(FM350GL_TIME_HW_INIT); /src/drivers/wwan/fm/acpi_fm350gl.c: 113 in wwan_fm350gl_acpi_method_shrf() 107 static void wwan_fm350gl_acpi_method_shrf(const struct device *parent_dev, 108 const struct drivers_wwan_fm_config *config) 109 { 110 acpigen_write_method_serialized("SHRF", 0); 111 { 112 /* call rtd3 method to Disable ModPHY Power Gating. */ >>> CID 1469541: (CONSTANT_EXPRESSION_RESULT) >>> "wwan_fm350gl_get_rtd3_method_support(config) | ACPI_PCIE_RP_EMIT_PSD0" >>> is always 1/true regardless of the values of its operand. This occurs as >>> the logical operand of "if". 113 if (wwan_fm350gl_get_rtd3_method_support(config) | 114 ACPI_PCIE_RP_EMIT_PSD0) { 115 acpigen_emit_namestring(acpi_device_path_join(parent_dev, 116 "PSD0")); 117 } 118 /* call rtd3 method to Enable SRC Clock. */ ** CID 1469540: API usage errors (VARARGS) /src/console/printk.c: 77 in wrap_interactive_printf() ________________________________________________________________________________________________________ *** CID 1469540: API usage errors (VARARGS) /src/console/printk.c: 77 in wrap_interactive_printf() 71 72 static void wrap_interactive_printf(const char *fmt, ...) 73 { 74 va_list args; 75 va_start(args, fmt); 76 vtxprintf(console_interactive_tx_byte, fmt, args, NULL); >>> CID 1469540: API usage errors (VARARGS) >>> "va_end" was not called for "args". 77 } 78 79 static void line_start(union log_state state) 80 { 81 if (state.level > BIOS_LOG_PREFIX_MAX_LEVEL) 82 return; ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P0qcxCbhZ31OYv50yq2SfQfrHt3Prsn4qSLrYIrajINpiFX8l0vrlNSf8iCrS27qY0Cr0DkycwNUgGZJj8-3DqGve_L-2FDzr14mnrsJO5b1wX1hp9b1MAQygl7x-2B74RAaH2cn0UwqsPABAivuZYJelqPMXUXdPzeNuwhzoXS-2FV9eWTUAIWOE4NVrB4Ft-2BPxmBmzLjmNnn08oZ-2BjaYAJYxPlfQf7nZj7apuWv4WsDO-2FEhOzc55HBGqqq1-2F-2BUGY7hweQC-2BZrWQMEi4SysfQNE-2FsnX-2BshDzO5iwHCn-2FT5RDrje3ZRTXQ-3D-3D _______________________________________________ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org