Hi, On Sat, Apr 23, 2022 at 11:37 AM Peter Stuge <pe...@stuge.se> wrote: > > Martin Butt wrote: > > Do you know if Coreboot would work on either of these systems? > .. > > Both the 3290 and the 3030 CPUs are a Intel Celeron N2807 1.58GHz > > That's the CPU marketing name which in firmware like coreboot doesn't > mean much. What matters is that this is a Bay Trail platform.
Yes, it's a Bay Trail platform. > > From a visual inspection, the only difference between the boards of the two > > models is that the BIOS chip is different. The 3029 is a Winbond 25Q64FVSIG > > (or a 25Q64FWSIG, the chip is hard to read). The 3030 is a Macronix > > MX25U6435F. > > The 25Q64 chip is unproblematic. flashrom mentiones an OTP region in > the MX chip, I would investigate if and how that is being used, if > the OTP lies within the 8 Mbyte then that could be a problem and > you'd have to replace the chip by soldering. I've never seen the OTP being used in any x86 systems. Note that these SPI flash chips run at 1.8V, not the usual 3.3V that most programmers provide. > (If you need to replace a chip: cut its pins flush with the black > package so that you can first remove the package and then use a > soldering iron to remove one pin at a time. Clean the pads with > solder wick and then solder a new chip in.) > > > flashrom v1.2 on Linux 5.13.0-30-generic (x86_64) > .. > > Found chipset "Intel Bay Trail" with PCI ID 8086:0f1c. > > I know that coreboot *has* had *some* support for Bay Trail, IIRC > the minnowmax board, IIRC that was the very first attempt at using > Intel's FSP blob in coreboot and I think it did work but it wasn't > a great success. You'd have to investigate. Support for the Bay Trail FSP was dropped from coreboot after the 4.11 release because it's impossible to implement the postcar stage with FSP 1.0 (see 4.12 release notes). However, coreboot still has Bay Trail support using the MRC.bin blob from Chromebooks (the refcode.elf blob used to be required as well, but it was reimplemented as native coreboot code). You can use `mainboard/bostentech/gbyt4` as an example coreboot port for a Bay Trail board. > Kind regards > > //Peter > _______________________________________________ > coreboot mailing list -- coreboot@coreboot.org > To unsubscribe send an email to coreboot-le...@coreboot.org Best regards, Angel _______________________________________________ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
