Years ago when I first wrote the 440BX ram init code, I also wrote a
test program that would read some SPD dump files and set up a
simulated environment to run my ram init code in, without actually
flashing a chip. I now have to do it again and I can't seem to get it
to work again. Maybe the build system has changed since then.
I am looking to just compile this program and
nb/intel/i440bx/raminit.c (unmodified beyond patches I'm testing) and
link them together for an executable to run from the command line.
Here is the command line I figured would work, gathered with "make -n":
gcc -Isrc -Isrc/include -Isrc/commonlib/include
-Isrc/commonlib/bsd/include -Ibuild -I3rdparty/vboot/firmware/include
-include src/include/kconfig.h -include src/include/rules.h -include
src/commonlib/bsd/include/commonlib/bsd/compiler.h -I3rdparty
-D__BUILD_DIR__=\"build\" -Isrc/arch/x86/include -D__ARCH_x86_32__
-Isrc/device/oprom/include -nostdinc -pipe -g -std=gnu11 -nostdlib
-Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes -Wwrite-strings
-Wredundant-decls -Wno-trigraphs -Wimplicit-fallthrough -Wshadow
-Wdate-time -Wtype-limits -Wvla -Wold-style-definition -Wdangling-else
-Wmissing-include-dirs -fno-common -ffreestanding -fno-builtin
-fomit-frame-pointer -fstrict-aliasing -ffunction-sections
-fdata-sections -fno-pie -Wno-packed-not-aligned -fconserve-stack
-Wnull-dereference -Wreturn-type -Wlogical-op -Wduplicated-cond
-Wno-unused-but-set-variable -Werror -Os -Wno-address-of-packed-member
-m32 -fuse-ld=bfd -fno-stack-protector -Wl,--build-id=none
-fno-delete-null-pointer-checks -Wlogical-op -march=i686 -mno-mmx
--param asan-globals=0 -D__RAMSTAGE__ -include build/config.h
src/northbridge/intel/i440bx/raminit.c
src/northbridge/intel/i440bx/raminittest.c -o raminittest2023
The C test code is attached.
Any suggestions is appreciated.
Thanks
Keith
#include <stdio.h>
#include <stdlib.h>
#include <stdarg.h>
#include <stdint.h>
#include <unistd.h>
#include <getopt.h>
#include <string.h>
#include <kconfig.h>
#include "standalonetest.h"
enum timestamp_id {
TS_START_ROMSTAGE = 1,
TS_BEFORE_INITRAM = 2,
TS_AFTER_INITRAM = 3,
};
void timestamp_add_now(enum timestamp_id id);
#include <delay.h>
#include "i440bx.h"
#include "raminit.h"
#include <southbridge/intel/i82371eb/i82371eb.h>
int smbus_read_byte(u8 device, u8 address);
void udelay(unsigned int usecs) {}
int do_printk(int msg_level, const char *fmt, ...)
__attribute__((format(printf, 2, 3)));
// #define printk(LEVEL, fmt, args...) do_printk(LEVEL, fmt, ##args)
#define printk(level, fmt, args...) printf(fmt, ##args)
void die(const char *fmt, ...);
void * pcicfgspace;
u8 pci_read_config8(u32 dev, u16 where)
{
u8 * p = (u8 *)pcicfgspace+where;
return *p;
}
u16 pci_read_config16(u32 dev, u16 where)
{
u16 * p = (u16 *)pcicfgspace+where;
return *p;
}
void pci_write_config8(u32 dev, u16 where, u8 value)
{
u8 * p = (u8 *)(pcicfgspace+where);
*p=value;
}
void pci_write_config16(u32 dev, u16 where, u16 value)
{
u16 * p = (u16 *)(pcicfgspace+where);
*p=value;
}
/* void dump_spd_registers(void)
{
int i;
printf("\n");
for (i = 0; i < DIMM_SOCKETS; i++) {
unsigned int device;
device = DIMM0 + i;
if (device) {
int j = 0;
printf("DIMM %d: %02x", i, device);
int c = smbus_read_byte(device, 0);
printf("\n%02x:", 0);
if (c < 0) {
printf("bad device\n");
break;
}
printf(" %02x", c);
for (j = 1; j < c; j++) {
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
printf("\n%02x:", j);
}
status = smbus_read_byte(device, j);
byte = status & 0xff;
printf(" %02x", byte);
}
printf("\n");
}
}
} */
void dump_pci_device(unsigned dev)
{
int i;
for (i = 0; i <= 255; i++) {
unsigned char val;
val = pci_read_config8(dev, i);
if ((i & 0x0f) == 0)
printf("%02x:", i);
printf(" %02x", val);
if ((i & 0x0f) == 0x0f)
printf("\n");
}
}
u8 * spd_50;
u8 * spd_51;
u8 * spd_52;
u8 * spd_53;
int smbus_read_byte(u8 device, u8 address) {
u8 * spd;
int r = -1;
switch (device) {
case 0x50:
spd = spd_50;
break;
case 0x51:
spd = spd_51;
break;
case 0x52:
spd = spd_52;
break;
case 0x53:
spd = spd_53;
break;
default:
spd = 0;
}
if (spd)
r = spd[address];
return r;
}
unsigned char cmos_read(unsigned char addr) {
return 0;
}
void cmos_write_inner(unsigned char val, unsigned char addr) {}
void timestamp_add_now(enum timestamp_id id) {}
static void bx_powerup(void) {
// u32 * p32;
pcicfgspace = calloc(1,256);
/*
p32 = (u32 *)pcicfgspace + 0;
*p32 = 0x71908086;
p32+=4;
*p32 = 0x2100006;
p32+=4;
*p32 = 0x6000002;
p32 = (u32 *)pcicfgspace + 0x10;
*p32 = 0x8;
*(pcicfgspace+0x34) = 0xa0;
*(pcicfgspace+0x58) = 0x3;
*(pcicfgspace+0x72) = 0x2;
*(pcicfgspace+0x73) = 0x38;
*(pcicfgspace+0x7b) = 0x38;
*(pcicfgspace+0x90) = 0x80;
p32 = (u32 *)pcicfgspace + 0xa0;
*p32 = 0x100002;
p32 += 4;
*p32 = 0x1f000203;
*/
}
static void freeall(void) {
free(pcicfgspace);
if (spd_50) free(spd_50);
if (spd_51) free(spd_51);
if (spd_52) free(spd_52);
if (spd_53) free(spd_53);
}
/*
int printk(int msg_level, const char *fmt, ...)
{
va_list args;
int i;
va_start(args, fmt);
i = vprintf(fmt, args);
va_end(args);
return i;
} */
void die(const char *fmt, ...)
{
va_list args;
va_start(args, fmt);
vprintf(fmt, args);
va_end(args);
freeall();
exit(1);
}
uint32_t read32(void *addr)
{
printf("jig: read32(%08x)\n",(uint32_t)addr);
return 0;
}
void main(int argc, char **argv) {
int c;
spd_50=spd_51=spd_52=spd_53=0;
u8 * target = 0;
FILE * spdfile;
while ((c = getopt(argc,argv,"1:2:3:4:")) != -1) {
switch (c) {
case '1':
spd_50=calloc(1,256); target = spd_50; goto load_spd;
case '2':
spd_51=calloc(1,256); target = spd_51; goto load_spd;
case '3':
spd_52=calloc(1,256); target = spd_52; goto load_spd;
case '4':
spd_53=calloc(1,256); target = spd_53;
load_spd:
spdfile = fopen(optarg,"r");
c = fread(target,1,256, spdfile);
fclose(spdfile);
break;
case '?':
printf("Option -%c requires a SPD dump file.\n", optopt);
break;
}
}
bx_powerup();
sdram_initialize(0);
//abort:
freeall();
}
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