Hi,
Please find the latest report on new defect(s) introduced to coreboot found
with Coverity Scan.
4 new defect(s) introduced to coreboot found with Coverity Scan.
1 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent
build analyzed by Coverity Scan.
New defect(s) Reported-by: Coverity Scan
Showing 4 of 4 defect(s)
** CID 1517819: Integer handling issues (OVERFLOW_BEFORE_WIDEN)
/src/soc/intel/common/block/systemagent/systemagent.c: 243 in imr_resource()
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*** CID 1517819: Integer handling issues (OVERFLOW_BEFORE_WIDEN)
/src/soc/intel/common/block/systemagent/systemagent.c: 243 in imr_resource()
237 size_k = ((~mask & 0x0fffffff) + 1);
238 /*
239 * IMRs sit in lower DRAM. Mark them cacheable, otherwise we run
240 * out of MTRRs. Memory reserved by IMRs is not usable for host
241 * so mark it reserved.
242 */
>>> CID 1517819: Integer handling issues (OVERFLOW_BEFORE_WIDEN)
>>> Potentially overflowing expression "base_k * 1024U" with type "unsigned
>>> int" (32 bits, unsigned) is evaluated using 32-bit arithmetic, and then
>>> used in a context that expects an expression of type "uint64_t" (64 bits,
>>> unsigned).
243 reserved_ram_range(dev, idx, base_k * KiB, size_k * KiB);
244 }
245
246 /*
247 * Add IMR ranges that hang off the host bridge/memory
248 * controller device in case CONFIG(SA_ENABLE_IMR) is selected by SoC.
** CID 1517818: Integer handling issues (OVERFLOW_BEFORE_WIDEN)
/src/northbridge/intel/i440bx/northbridge.c: 65 in
i440bx_domain_read_resources()
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*** CID 1517818: Integer handling issues (OVERFLOW_BEFORE_WIDEN)
/src/northbridge/intel/i440bx/northbridge.c: 65 in
i440bx_domain_read_resources()
59 tolmk = tomk;
60 }
61
62 /* Report the memory regions. */
63 idx = 10;
64 ram_range(dev, idx++, 0, 0xa0000);
>>> CID 1517818: Integer handling issues (OVERFLOW_BEFORE_WIDEN)
>>> Potentially overflowing expression "tolmk * 1024UL" with type "unsigned
>>> long" (32 bits, unsigned) is evaluated using 32-bit arithmetic, and then
>>> used in a context that expects an expression of type "uint64_t" (64 bits,
>>> unsigned).
65 ram_from_to(dev, idx++, 0xc0000, tolmk * KiB);
66 }
67 }
68
69 static struct device_operations pci_domain_ops = {
70 .read_resources = i440bx_domain_read_resources,
** CID 1517817: Integer handling issues (OVERFLOW_BEFORE_WIDEN)
/src/mainboard/emulation/qemu-riscv/mainboard.c: 17 in mainboard_enable()
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*** CID 1517817: Integer handling issues (OVERFLOW_BEFORE_WIDEN)
/src/mainboard/emulation/qemu-riscv/mainboard.c: 17 in mainboard_enable()
11
12 if (!dev) {
13 die("No dev0; die\n");
14 }
15
16 dram_mb_detected = probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB);
>>> CID 1517817: Integer handling issues (OVERFLOW_BEFORE_WIDEN)
>>> Potentially overflowing expression "dram_mb_detected * 1048576U" with
>>> type "unsigned int" (32 bits, unsigned) is evaluated using 32-bit
>>> arithmetic, and then used in a context that expects an expression of type
>>> "uint64_t" (64 bits, unsigned).
17 ram_range(dev, 0, (uintptr_t)_dram, dram_mb_detected * MiB);
18 }
19
20 struct chip_operations mainboard_ops = {
21 .enable_dev = mainboard_enable,
** CID 1517816: Integer handling issues (OVERFLOW_BEFORE_WIDEN)
/src/soc/intel/common/block/systemagent/systemagent.c: 243 in imr_resource()
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*** CID 1517816: Integer handling issues (OVERFLOW_BEFORE_WIDEN)
/src/soc/intel/common/block/systemagent/systemagent.c: 243 in imr_resource()
237 size_k = ((~mask & 0x0fffffff) + 1);
238 /*
239 * IMRs sit in lower DRAM. Mark them cacheable, otherwise we run
240 * out of MTRRs. Memory reserved by IMRs is not usable for host
241 * so mark it reserved.
242 */
>>> CID 1517816: Integer handling issues (OVERFLOW_BEFORE_WIDEN)
>>> Potentially overflowing expression "size_k * 1024U" with type "unsigned
>>> int" (32 bits, unsigned) is evaluated using 32-bit arithmetic, and then
>>> used in a context that expects an expression of type "uint64_t" (64 bits,
>>> unsigned).
243 reserved_ram_range(dev, idx, base_k * KiB, size_k * KiB);
244 }
245
246 /*
247 * Add IMR ranges that hang off the host bridge/memory
248 * controller device in case CONFIG(SA_ENABLE_IMR) is selected by SoC.
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To view the defects in Coverity Scan visit,
https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P0qcxCbhZ31OYv50yq2SfQfrHt3Prsn4qSLrYIrajINpiFX8l0vrlNSf8iCrS27qY0Cr0DkycwNUgGZJj8-3DQswF_L-2FDzr14mnrsJO5b1wX1hp9b1MAQygl7x-2B74RAaH2cn3g-2B9jwG9oFpm0-2BjGJxO-2B2IHTFyawOkLEiQ2WyCIkcNt4L-2BDjMQYN-2B7-2BzDTubimMqwgrDEd-2BZ-2F7biisvgvJP-2BUp-2FTPzpFmPQ5VoyDYQW1OXZDxyOKRfp2Sw9cU1s4f8fiPoNt3lAG-2BewS37xBTnff80z0UtoDHfSVKHArXn0RzsfQ-3D-3D
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