[coreboot] Baytrail issue to communicate with superios.

[Jose Trujillo via coreboot]

Dear Rudolf/All,

Today I patched superiotool to add support for Fintek F81803A and dumped both 
superios, and I found that LPC clock must be set at 24MHz on Fintek global 
control register #26 from the default 48MHz.

So, now I am working on it, looking how to set correctly this register.

Thank you,
JT.

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