Here's the output of `cbmem -1` (attachment) Dec 16, 2025, 18:49 by [email protected]:
> Dear nine-ball, > > > Am 16.12.25 um 19:02 schrieb nine-ball--- via coreboot: > >> I have SeaBIOS on my machine. On QEMU it's very fast. On real >> hardware, it takes 10+ seconds to register a keypress. >> >> How to fix? >> > Without more information, not much can be said. Please attach the logs you > can get with `cbmem -1` or with the right module from `/sys/firmware/log`. > > > Kind regards, > > Paul >
[NOTE ] coreboot-/nix/store/jym9wgzni8fvcdmc6s07zz7p563kg8dj-coreboot Thu Jan 01 00:00:00 UTC 1970 x86_32 bootblock starting (log level: 7)... [DEBUG] CPU: Intel(R) Core(TM) i5-8250U CPU @ 1.60GHz [DEBUG] CPU: ID 806ea, Kabylake Y0, ucode: 000000f5 [DEBUG] CPU: AES supported, TXT NOT supported, VT supported [DEBUG] MCH: device id 5914 (rev 08) is Kabylake-R ULT [DEBUG] PCH: device id 9d4e (rev 21) is Kabylake-U iHDCP 2.2 Premium [DEBUG] IGD: device id 5917 (rev 07) is Kaby Lake-R ULT GT2 [WARN ] PMC: Duplicate GPE DW register values detected; using default GPE route from MISCCFG register [DEBUG] FMAP: Found "FLASH" version 1.1 at 0x710000. [DEBUG] FMAP: base = 0x0 size = 0x1000000 #areas = 7 [DEBUG] FMAP: area COREBOOT found @ 710200 (9371136 bytes) [INFO ] CBFS: mcache @0xfef04e00 built for 22 files, used 0x468 of 0x4000 bytes [INFO ] CBFS: Found 'fallback/romstage' @0x67dc0 size 0xe958 in mcache @0xfef04e8c [DEBUG] BS: bootblock times (exec / console): total (unknown) / 0 ms [NOTE ] coreboot-/nix/store/jym9wgzni8fvcdmc6s07zz7p563kg8dj-coreboot Thu Jan 01 00:00:00 UTC 1970 x86_32 romstage starting (log level: 7)... [WARN ] HECI: CSE device 16.0 is disabled [DEBUG] pm1_sts: 0000 pm1_en: 4000 pm1_cnt: 00000000 [DEBUG] gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000 [DEBUG] gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000 [DEBUG] gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000 [DEBUG] gpe0_sts[3]: 00002800 gpe0_en[3]: 00000000 [DEBUG] TCO_STS: 0000 0000 [DEBUG] GEN_PMCON: e0a40200 00001a38 [DEBUG] GBLRST_CAUSE: 00000000 00000000 [DEBUG] prev_sleep_state 0 (S0) [DEBUG] FMAP: area COREBOOT found @ 710200 (9371136 bytes) [INFO ] CBFS: Found 'fspm.bin' @0x9cdc0 size 0x63000 in mcache @0xfef05074 [DEBUG] FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes) [DEBUG] SPD @ 0x50 [INFO ] SPD: module type is DDR4 [INFO ] SPD: module part number is CT32G4SFD832A.M16FF [INFO ] SPD: banks 16, ranks 2, rows 17, columns 10, density 16384 Mb [INFO ] SPD: device width 8 bits, bus width 64 bits [INFO ] SPD: module size is 32768 MB (per channel) [DEBUG] SPD @ 0x51 [INFO ] SPD: module type is DDR4 [INFO ] SPD: module part number is CT32G4SFD832A.M16FF [INFO ] SPD: banks 16, ranks 2, rows 17, columns 10, density 16384 Mb [INFO ] SPD: device width 8 bits, bus width 64 bits [INFO ] SPD: module size is 32768 MB (per channel) [DEBUG] CBMEM: [DEBUG] IMD: root @ 0x7afff000 254 entries. [DEBUG] IMD: root @ 0x7affec00 62 entries. [DEBUG] External stage cache: [DEBUG] IMD: root @ 0x7b3ff000 254 entries. [DEBUG] IMD: root @ 0x7b3fec00 62 entries. [DEBUG] FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes) [DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'. [INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x1000000 [DEBUG] MRC: 'RW_MRC_CACHE' does not need update. [DEBUG] 2 DIMMs found [DEBUG] SMM Memory Map [DEBUG] SMRAM : 0x7b000000 0x800000 [DEBUG] Subregion 0: 0x7b000000 0x200000 [DEBUG] Subregion 1: 0x7b200000 0x200000 [DEBUG] Subregion 2: 0x7b400000 0x400000 [DEBUG] top_of_ram = 0x7b000000 [DEBUG] Normal boot [INFO ] CBFS: Found 'fallback/postcar' @0x123e40 size 0x5c18 in mcache @0xfef050e8 [DEBUG] Loading module at 0x7abcf000 with entry 0x7abcf031. filesize: 0x5888 memsize: 0xbbd8 [DEBUG] Processing 212 relocs. Offset value of 0x78bcf000 [DEBUG] BS: romstage times (exec / console): total (unknown) / 1 ms [NOTE ] coreboot-/nix/store/jym9wgzni8fvcdmc6s07zz7p563kg8dj-coreboot Thu Jan 01 00:00:00 UTC 1970 x86_32 postcar starting (log level: 7)... [DEBUG] Normal boot [DEBUG] FMAP: area COREBOOT found @ 710200 (9371136 bytes) [INFO ] CBFS: Found 'fallback/ramstage' @0x76780 size 0x20c42 in mcache @0x7abdd0ec [DEBUG] Loading module at 0x7aa7b000 with entry 0x7aa7b000. filesize: 0x41f18 memsize: 0x152830 [DEBUG] Processing 5023 relocs. Offset value of 0x76a7b000 [DEBUG] BS: postcar times (exec / console): total (unknown) / 0 ms [NOTE ] coreboot-/nix/store/jym9wgzni8fvcdmc6s07zz7p563kg8dj-coreboot Thu Jan 01 00:00:00 UTC 1970 x86_32 ramstage starting (log level: 7)... [DEBUG] Normal boot [DEBUG] microcode: sig=0x806ea pf=0x80 revision=0xf5 [DEBUG] FMAP: area COREBOOT found @ 710200 (9371136 bytes) [INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x80 size 0x67c00 in mcache @0x7abdd02c [DEBUG] Skip microcode update [INFO ] CBFS: Found 'fsps.bin' @0xffe00 size 0x23ff2 in mcache @0x7abdd2b4 [DEBUG] Detected 4 core, 8 thread CPU. [DEBUG] Setting up SMI for CPU [DEBUG] IED base = 0x7b400000 [DEBUG] IED size = 0x00400000 [INFO ] Will perform SMM setup. [INFO ] CPU: Intel(R) Core(TM) i5-8250U CPU @ 1.60GHz. [INFO ] LAPIC 0x0 in XAPIC mode. [DEBUG] CPU: APIC: 00 enabled [DEBUG] CPU: APIC: 01 enabled [DEBUG] CPU: APIC: 02 enabled [DEBUG] CPU: APIC: 03 enabled [DEBUG] CPU: APIC: 04 enabled [DEBUG] CPU: APIC: 05 enabled [DEBUG] CPU: APIC: 06 enabled [DEBUG] CPU: APIC: 07 enabled [DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178 [DEBUG] Processing 16 relocs. Offset value of 0x00030000 [DEBUG] Attempting to start 7 APs [DEBUG] Waiting for 10ms after sending INIT. [DEBUG] Waiting for SIPI to complete... [DEBUG] done. [DEBUG] Waiting for SIPI to complete... [DEBUG] done. [INFO ] LAPIC 0x1 in XAPIC mode. [INFO ] AP: slot 1 apic_id 1, MCU rev: 0x000000f5 [INFO ] LAPIC 0x2 in XAPIC mode. [INFO ] LAPIC 0x3 in XAPIC mode. [INFO ] AP: slot 2 apic_id 2, MCU rev: 0x000000f5 [INFO ] AP: slot 3 apic_id 3, MCU rev: 0x000000f5 [INFO ] LAPIC 0x5 in XAPIC mode. [INFO ] LAPIC 0x4 in XAPIC mode. [INFO ] LAPIC 0x6 in XAPIC mode. [INFO ] LAPIC 0x7 in XAPIC mode. [INFO ] AP: slot 7 apic_id 6, MCU rev: 0x000000f5 [INFO ] AP: slot 5 apic_id 7, MCU rev: 0x000000f5 [INFO ] AP: slot 4 apic_id 5, MCU rev: 0x000000f5 [INFO ] AP: slot 6 apic_id 4, MCU rev: 0x000000f5 [DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a0 memsize: 0x1a0 [DEBUG] Processing 9 relocs. Offset value of 0x00038000 [DEBUG] smm_module_setup_stub: stack_top = 0x7b004000 [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800 [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000 [DEBUG] SMM Module: stub loaded at 38000. Will call 0x7aa9e06d [DEBUG] Installing permanent SMM handler to 0x7b000000 [DEBUG] HANDLER [0x7b1ff000-0x7b1ffd9f] [DEBUG] CPU 0 [DEBUG] ss0 [0x7b1fec00-0x7b1fefff] [DEBUG] stub0 [0x7b1f7000-0x7b1f719f] [DEBUG] CPU 1 [DEBUG] ss1 [0x7b1fe800-0x7b1febff] [DEBUG] stub1 [0x7b1f6c00-0x7b1f6d9f] [DEBUG] CPU 2 [DEBUG] ss2 [0x7b1fe400-0x7b1fe7ff] [DEBUG] stub2 [0x7b1f6800-0x7b1f699f] [DEBUG] CPU 3 [DEBUG] ss3 [0x7b1fe000-0x7b1fe3ff] [DEBUG] stub3 [0x7b1f6400-0x7b1f659f] [DEBUG] CPU 4 [DEBUG] ss4 [0x7b1fdc00-0x7b1fdfff] [DEBUG] stub4 [0x7b1f6000-0x7b1f619f] [DEBUG] CPU 5 [DEBUG] ss5 [0x7b1fd800-0x7b1fdbff] [DEBUG] stub5 [0x7b1f5c00-0x7b1f5d9f] [DEBUG] CPU 6 [DEBUG] ss6 [0x7b1fd400-0x7b1fd7ff] [DEBUG] stub6 [0x7b1f5800-0x7b1f599f] [DEBUG] CPU 7 [DEBUG] ss7 [0x7b1fd000-0x7b1fd3ff] [DEBUG] stub7 [0x7b1f5400-0x7b1f559f] [DEBUG] stacks [0x7b000000-0x7b003fff] [DEBUG] Loading module at 0x7b1ff000 with entry 0x7b1ff026. filesize: 0xd90 memsize: 0xda0 [DEBUG] Processing 81 relocs. Offset value of 0x7b1ff000 [DEBUG] Loading module at 0x7b1f7000 with entry 0x7b1f7000. filesize: 0x1a0 memsize: 0x1a0 [DEBUG] Processing 9 relocs. Offset value of 0x7b1f7000 [DEBUG] smm_module_setup_stub: stack_top = 0x7b004000 [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800 [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x200000 [DEBUG] SMM Module: placing smm entry code at 7b1f6c00, cpu # 0x1 [DEBUG] SMM Module: placing smm entry code at 7b1f6800, cpu # 0x2 [DEBUG] SMM Module: placing smm entry code at 7b1f6400, cpu # 0x3 [DEBUG] SMM Module: placing smm entry code at 7b1f6000, cpu # 0x4 [DEBUG] SMM Module: placing smm entry code at 7b1f5c00, cpu # 0x5 [DEBUG] SMM Module: placing smm entry code at 7b1f5800, cpu # 0x6 [DEBUG] SMM Module: placing smm entry code at 7b1f5400, cpu # 0x7 [DEBUG] SMM Module: stub loaded at 7b1f7000. Will call 0x7b1ff026 [DEBUG] Clearing SMI status registers [DEBUG] GPE0 STD STS: PME_B0 PME [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ef000, cpu = 0 [DEBUG] In relocation handler: CPU 0 [DEBUG] New SMBASE=0x7b1ef000 IEDBASE=0x7b400000 [DEBUG] Writing SMRR. base = 0x7b000006, mask=0xff800800 [DEBUG] Relocation complete. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1eec00, cpu = 1 [DEBUG] In relocation handler: CPU 1 [DEBUG] New SMBASE=0x7b1eec00 IEDBASE=0x7b400000 [DEBUG] Relocation complete. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ed800, cpu = 6 [DEBUG] In relocation handler: CPU 6 [DEBUG] New SMBASE=0x7b1ed800 IEDBASE=0x7b400000 [DEBUG] Writing SMRR. base = 0x7b000006, mask=0xff800800 [DEBUG] Relocation complete. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ee000, cpu = 4 [DEBUG] In relocation handler: CPU 4 [DEBUG] New SMBASE=0x7b1ee000 IEDBASE=0x7b400000 [DEBUG] Relocation complete. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1edc00, cpu = 5 [DEBUG] In relocation handler: CPU 5 [DEBUG] New SMBASE=0x7b1edc00 IEDBASE=0x7b400000 [DEBUG] Relocation complete. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ed400, cpu = 7 [DEBUG] In relocation handler: CPU 7 [DEBUG] New SMBASE=0x7b1ed400 IEDBASE=0x7b400000 [DEBUG] Writing SMRR. base = 0x7b000006, mask=0xff800800 [DEBUG] Relocation complete. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ee800, cpu = 2 [DEBUG] In relocation handler: CPU 2 [DEBUG] New SMBASE=0x7b1ee800 IEDBASE=0x7b400000 [DEBUG] Writing SMRR. base = 0x7b000006, mask=0xff800800 [DEBUG] Relocation complete. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ee400, cpu = 3 [DEBUG] In relocation handler: CPU 3 [DEBUG] New SMBASE=0x7b1ee400 IEDBASE=0x7b400000 [DEBUG] Relocation complete. [INFO ] Initializing CPU #0 [DEBUG] CPU: vendor Intel device 806ea [DEBUG] CPU: family 06, model 8e, stepping 0a [DEBUG] Clearing out pending MCEs [DEBUG] cpu: energy policy set to 6 [INFO ] Turbo is available but hidden [INFO ] Turbo is available and visible [DEBUG] Skip microcode update [INFO ] CPU #0 initialized [INFO ] Initializing CPU #1 [INFO ] Initializing CPU #6 [INFO ] Initializing CPU #4 [DEBUG] CPU: vendor Intel device 806ea [DEBUG] CPU: family 06, model 8e, stepping 0a [DEBUG] CPU: vendor Intel device 806ea [DEBUG] CPU: family 06, model 8e, stepping 0a [DEBUG] Clearing out pending MCEs [DEBUG] Clearing out pending MCEs [INFO ] Initializing CPU #2 [INFO ] Initializing CPU #3 [DEBUG] CPU: vendor Intel device 806ea [DEBUG] CPU: family 06, model 8e, stepping 0a [DEBUG] CPU: vendor Intel device 806ea [DEBUG] CPU: family 06, model 8e, stepping 0a [DEBUG] Clearing out pending MCEs [DEBUG] Clearing out pending MCEs [INFO ] Initializing CPU #5 [INFO ] Initializing CPU #7 [DEBUG] CPU: vendor Intel device 806ea [DEBUG] CPU: family 06, model 8e, stepping 0a [DEBUG] CPU: vendor Intel device 806ea [DEBUG] CPU: family 06, model 8e, stepping 0a [DEBUG] Clearing out pending MCEs [DEBUG] Clearing out pending MCEs [DEBUG] CPU: vendor Intel device 806ea [DEBUG] CPU: family 06, model 8e, stepping 0a [DEBUG] Clearing out pending MCEs [DEBUG] cpu: energy policy set to 6 [DEBUG] Skip microcode update [INFO ] CPU #6 initialized [DEBUG] cpu: energy policy set to 6 [DEBUG] cpu: energy policy set to 6 [DEBUG] Skip microcode update [INFO ] CPU #4 initialized [DEBUG] Skip microcode update [INFO ] CPU #2 initialized [DEBUG] cpu: energy policy set to 6 [DEBUG] cpu: energy policy set to 6 [DEBUG] Skip microcode update [INFO ] CPU #3 initialized [DEBUG] Skip microcode update [INFO ] CPU #1 initialized [DEBUG] cpu: energy policy set to 6 [DEBUG] Skip microcode update [INFO ] CPU #5 initialized [DEBUG] cpu: energy policy set to 6 [DEBUG] Skip microcode update [INFO ] CPU #7 initialized [INFO ] bsp_do_flight_plan done after 1 msecs. [DEBUG] CPU: frequency set to 3400 MHz [DEBUG] Enabling SMIs. [DEBUG] Locking SMM. [DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled [DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled [DEBUG] IA32_FEATURE_CONTROL already locked [DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled [DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled [DEBUG] IA32_FEATURE_CONTROL already locked [DEBUG] IA32_FEATURE_CONTROL already locked [DEBUG] IA32_FEATURE_CONTROL already locked [DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled [DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled [DEBUG] IA32_FEATURE_CONTROL already locked [DEBUG] IA32_FEATURE_CONTROL already locked [DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled [DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled [DEBUG] IA32_FEATURE_CONTROL already locked [DEBUG] IA32_FEATURE_CONTROL already locked [DEBUG] BS: BS_DEV_INIT_CHIPS entry times (exec / console): 23 / 0 ms [INFO ] FSPS, status=0x00000000 [INFO ] ITSS IRQ Polarities Before: [INFO ] IPC0: 0x00ff4000 [INFO ] IPC1: 0x00000007 [INFO ] IPC2: 0x00000000 [INFO ] IPC3: 0x00000000 [INFO ] ITSS IRQ Polarities After: [INFO ] IPC0: 0x00ff4000 [INFO ] IPC1: 0x00000007 [INFO ] IPC2: 0x00000000 [INFO ] IPC3: 0x00000000 [INFO ] Found PCIe Root Port #7 at PCI: 00:1c.0. [INFO ] Found PCIe Root Port #9 at PCI: 00:1d.0. [INFO ] Found PCIe Root Port #11 at PCI: 00:1d.2. [NOTE ] pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:00:1c.0) which was enabled in devicetree, removing and disabling. [NOTE ] pcie_rp_update_dev: Couldn't find PCIe Root Port #5 (originally PCI: 00:00:1c.4) which was enabled in devicetree, removing and disabling. [INFO ] Remapping PCIe Root Port #7 from PCI: 00:00:1c.6 to new function number 0. [DEBUG] BS: BS_DEV_INIT_CHIPS run times (exec / console): 341 / 0 ms [INFO ] Enumerating buses... [DEBUG] Discrete GPU not present [DEBUG] Root Device scanning... [DEBUG] CPU_CLUSTER: 0 enabled [DEBUG] DOMAIN: 00000000 enabled [DEBUG] DOMAIN: 00000000 scanning... [DEBUG] PCI: pci_scan_bus for segment group 00 bus 00 [DEBUG] PCI: 00:00:00.0 [8086/5914] enabled [DEBUG] PCI: 00:00:02.0 [8086/5917] enabled [DEBUG] PCI: 00:00:04.0 [8086/1903] enabled [DEBUG] PCI: 00:00:14.0 [8086/9d2f] enabled [DEBUG] PCI: 00:00:14.2 [8086/9d31] enabled [INFO ] PCI: Static device PCI: 00:00:17.0 not found, disabling it. [DEBUG] PCI: 00:00:1c.0 [8086/9d16] enabled [DEBUG] PCI: 00:00:1d.0 [8086/9d18] enabled [DEBUG] PCI: 00:00:1d.2 [8086/9d1a] enabled [DEBUG] PCI: 00:00:1f.0 [8086/9d4e] enabled [DEBUG] PCI: 00:00:1f.1 [8086/9d20] enabled [DEBUG] PCI: 00:00:1f.2 [8086/9d21] enabled [DEBUG] PCI: 00:00:1f.3 [8086/9d71] enabled [DEBUG] PCI: 00:00:1f.6 [8086/15d7] enabled [DEBUG] GPIO: 0 enabled [WARN ] PCI: Leftover static devices: [WARN ] PCI: 00:00:01.0 [WARN ] PCI: 00:00:01.1 [WARN ] PCI: 00:00:01.2 [WARN ] PCI: 00:00:05.0 [WARN ] PCI: 00:00:07.0 [WARN ] PCI: 00:00:08.0 [WARN ] PCI: 00:00:13.0 [WARN ] PCI: 00:00:14.1 [WARN ] PCI: 00:00:14.3 [WARN ] PCI: 00:00:15.0 [WARN ] PCI: 00:00:15.1 [WARN ] PCI: 00:00:15.2 [WARN ] PCI: 00:00:15.3 [WARN ] PCI: 00:00:16.0 [WARN ] PCI: 00:00:16.1 [WARN ] PCI: 00:00:16.2 [WARN ] PCI: 00:00:16.3 [WARN ] PCI: 00:00:16.4 [WARN ] PCI: 00:00:17.0 [WARN ] PCI: 00:00:19.0 [WARN ] PCI: 00:00:19.1 [WARN ] PCI: 00:00:19.2 [WARN ] PCI: 00:00:1b.0 [WARN ] PCI: 00:00:1b.1 [WARN ] PCI: 00:00:1b.2 [WARN ] PCI: 00:00:1b.3 [WARN ] PCI: 00:00:1b.4 [WARN ] PCI: 00:00:1b.5 [WARN ] PCI: 00:00:1b.6 [WARN ] PCI: 00:00:1b.7 [WARN ] PCI: 00:00:1d.4 [WARN ] PCI: 00:00:1d.5 [WARN ] PCI: 00:00:1d.6 [WARN ] PCI: 00:00:1d.7 [WARN ] PCI: 00:00:1e.0 [WARN ] PCI: 00:00:1e.1 [WARN ] PCI: 00:00:1e.2 [WARN ] PCI: 00:00:1e.3 [WARN ] PCI: 00:00:1e.4 [WARN ] PCI: 00:00:1e.5 [WARN ] PCI: 00:00:1e.6 [WARN ] PCI: 00:00:1f.4 [WARN ] PCI: 00:00:1f.5 [WARN ] PCI: 00:00:1f.7 [WARN ] PCI: Check your devicetree.cb. [DEBUG] PCI: 00:00:02.0 scanning... [DEBUG] scan_bus: bus PCI: 00:00:02.0 finished in 0 msecs [DEBUG] PCI: 00:00:14.0 scanning... [DEBUG] USB0 port 0 disabled [DEBUG] scan_bus: bus PCI: 00:00:14.0 finished in 0 msecs [DEBUG] PCI: 00:00:1c.0 scanning... [DEBUG] PCI: pci_scan_bus for segment group 00 bus 01 [DEBUG] PCI: 00:01:00.0 [8086/2725] enabled [INFO ] PCIe: Common Clock Configuration already enabled [INFO ] L1 Sub-State supported from root port 28 [INFO ] L1 Sub-State Support = 0xf [INFO ] CommonModeRestoreTime = 0x28 [INFO ] Power On Value = 0x16, Power On Scale = 0x0 [INFO ] ASPM: Enabled L1 [INFO ] PCI: 00:01:00.0: Enabled LTR [INFO ] PCI: 00:01:00.0: Programmed LTR max latencies [INFO ] PCI: 00:00:1c.0: Setting Max_Payload_Size to 128 for devices under this root port [DEBUG] scan_bus: bus PCI: 00:00:1c.0 finished in 0 msecs [DEBUG] PCI: 00:00:1d.0 scanning... [DEBUG] PCI: pci_scan_bus for segment group 00 bus 02 [INFO ] PCI: 00:00:1d.0: Setting Max_Payload_Size to 128 for devices under this root port [DEBUG] scan_bus: bus PCI: 00:00:1d.0 finished in 0 msecs [DEBUG] PCI: 00:00:1d.2 scanning... [DEBUG] PCI: pci_scan_bus for segment group 00 bus 03 [DEBUG] PCI: 00:03:00.0 [15b7/5045] enabled [INFO ] PCIe: Common Clock Configuration already enabled [INFO ] PCIE CLK PM is not supported by endpoint [INFO ] L1 Sub-State supported from root port 29 [INFO ] L1 Sub-State Support = 0x7 [INFO ] CommonModeRestoreTime = 0x28 [INFO ] Power On Value = 0x16, Power On Scale = 0x0 [INFO ] ASPM: Enabled L1 [INFO ] PCI: 00:03:00.0: Enabled LTR [INFO ] PCI: 00:03:00.0: Programmed LTR max latencies [INFO ] PCI: 00:00:1d.2: Setting Max_Payload_Size to 128 for devices under this root port [DEBUG] scan_bus: bus PCI: 00:00:1d.2 finished in 0 msecs [DEBUG] PCI: 00:00:1f.0 scanning... [INFO ] PMH7: ID 06 Revision 12 [DEBUG] PNP: 00ff.1 enabled [INFO ] H8: EC Firmware ID N24HT24W-3.36, Version 9.01A [INFO ] H8: WWAN detection not implemented. Assuming WWAN installed [DEBUG] PNP: 00ff.2 enabled [INFO ] Found TPM 2.0 0x0000 by ST Microelectronics (0x104a) [DEBUG] PNP: 0c31.0 enabled [DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 4 msecs [DEBUG] PCI: 00:00:1f.2 scanning... [DEBUG] scan_bus: bus PCI: 00:00:1f.2 finished in 0 msecs [DEBUG] PCI: 00:00:1f.3 scanning... [DEBUG] scan_bus: bus PCI: 00:00:1f.3 finished in 0 msecs [DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 5 msecs [DEBUG] scan_bus: bus Root Device finished in 5 msecs [INFO ] done [DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 0 ms [INFO ] MRC: Could not find region 'UNIFIED_MRC_CACHE' [DEBUG] FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes) [INFO ] MRC: NOT enabling PRR for 'RW_MRC_CACHE'. [DEBUG] found VGA at PCI: 00:00:02.0 [DEBUG] Setting up VGA for PCI: 00:00:02.0 [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000 [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device [INFO ] Allocating resources... [INFO ] Reading resources... [DEBUG] SA MMIO resource: PCIEXBAR -> base = 0xe0000000, size = 0x10000000 [DEBUG] SA MMIO resource: MCHBAR -> base = 0xfed10000, size = 0x00008000 [DEBUG] SA MMIO resource: DMIBAR -> base = 0xfed18000, size = 0x00001000 [DEBUG] SA MMIO resource: EPBAR -> base = 0xfed19000, size = 0x00001000 [DEBUG] SA MMIO resource: GDXCBAR -> base = 0xfed84000, size = 0x00001000 [DEBUG] SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x00004000 [DEBUG] SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x00001000 [DEBUG] SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x00001000 [INFO ] Available memory above 4GB: 63488M [ERROR] PNP: 00ff.1 missing read_resources [ERROR] PNP: 00ff.2 missing read_resources [INFO ] Done reading resources. [INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) === [DEBUG] PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff [DEBUG] PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done [DEBUG] PCI: 00:00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff [DEBUG] PCI: 00:01:00.0 10 * [0x0 - 0x3fff] mem [DEBUG] PCI: 00:00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done [DEBUG] PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff [DEBUG] PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done [DEBUG] PCI: 00:00:1d.2 io: size: 0 align: 12 gran: 12 limit: ffff [DEBUG] PCI: 00:00:1d.2 io: size: 0 align: 12 gran: 12 limit: ffff done [DEBUG] PCI: 00:00:1d.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff [DEBUG] PCI: 00:03:00.0 10 * [0x0 - 0x3fff] mem [DEBUG] PCI: 00:00:1d.2 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done [DEBUG] PCI: 00:00:1d.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff [DEBUG] PCI: 00:00:1d.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done [INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) === [DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 00 base 00000000 limit 00000fff io (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 84 base 00001600 limit 0000167f io (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 88 base 000015e0 limit 000015ef io (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 8c base 00000080 limit 0000008f io (fixed) [DEBUG] avoid_fixed_resources: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.2 40 base 00001800 limit 000018ff io (fixed) [INFO ] DOMAIN: 00000000: Resource ranges: [INFO ] * Base: 1000, Size: 5e0, Tag: 100 [INFO ] * Base: 15f0, Size: 10, Tag: 100 [INFO ] * Base: 1680, Size: 180, Tag: 100 [INFO ] * Base: 1900, Size: e700, Tag: 100 [DEBUG] PCI: 00:00:02.0 20 * [0xffc0 - 0xffff] limit: ffff io [DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done [DEBUG] DOMAIN: 00000000 mem: base: 7b000000 size: 0 align: 0 gran: 0 limit: dfffffff [DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 00 base e0000000 limit efffffff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 01 base fed10000 limit fed17fff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 02 base fed18000 limit fed18fff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 03 base fed19000 limit fed19fff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 04 base fed84000 limit fed84fff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 05 base fed80000 limit fed83fff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 06 base fed90000 limit fed90fff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 07 base fed91000 limit fed91fff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 08 base 00000000 limit 0009ffff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 09 base 000c0000 limit 7affffff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0a base 7b000000 limit 7fffffff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0b base 100000000 limit 107fffffff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0c base 000a0000 limit 000bffff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0d base 000c0000 limit 000fffff mem (fixed) [DEBUG] avoid_fixed_resources: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.1 10 base fd000000 limit fdffffff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.2 48 base fe000000 limit fe00ffff mem (fixed) [INFO ] DOMAIN: 00000000: Resource ranges: [INFO ] * Base: 80000000, Size: 60000000, Tag: 200 [INFO ] * Base: 1080000000, Size: 6f80000000, Tag: 200 [DEBUG] PCI: 00:00:02.0 18 * [0xd0000000 - 0xdfffffff] limit: dfffffff prefmem [DEBUG] PCI: 00:00:02.0 10 * [0xcf000000 - 0xcfffffff] limit: cfffffff mem [DEBUG] PCI: 00:00:1c.0 20 * [0xcef00000 - 0xceffffff] limit: ceffffff mem [DEBUG] PCI: 00:00:1d.2 20 * [0xcee00000 - 0xceefffff] limit: ceefffff mem [DEBUG] PCI: 00:00:1f.6 10 * [0xcede0000 - 0xcedfffff] limit: cedfffff mem [DEBUG] PCI: 00:00:14.0 10 * [0xcedd0000 - 0xceddffff] limit: ceddffff mem [DEBUG] PCI: 00:00:1f.3 20 * [0xcedc0000 - 0xcedcffff] limit: cedcffff mem [DEBUG] PCI: 00:00:04.0 10 * [0xcedb8000 - 0xcedbffff] limit: cedbffff mem [DEBUG] PCI: 00:00:1f.2 10 * [0xcedb4000 - 0xcedb7fff] limit: cedb7fff mem [DEBUG] PCI: 00:00:1f.3 10 * [0xcedb0000 - 0xcedb3fff] limit: cedb3fff mem [DEBUG] PCI: 00:00:14.2 10 * [0xcedaf000 - 0xcedaffff] limit: cedaffff mem [DEBUG] DOMAIN: 00000000 mem: base: 7b000000 size: 0 align: 0 gran: 0 limit: dfffffff done [DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff done [DEBUG] PCI: 00:01:00.0 10 * [0xcef00000 - 0xcef03fff] limit: cef03fff mem [DEBUG] PCI: 00:03:00.0 10 * [0xcee00000 - 0xcee03fff] limit: cee03fff mem [INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete === [DEBUG] PCI: 00:00:02.0 10 <- [0x00000000cf000000 - 0x00000000cfffffff] size 0x01000000 gran 0x18 mem64 [DEBUG] PCI: 00:00:02.0 18 <- [0x00000000d0000000 - 0x00000000dfffffff] size 0x10000000 gran 0x1c prefmem64 [DEBUG] PCI: 00:00:02.0 20 <- [0x000000000000ffc0 - 0x000000000000ffff] size 0x00000040 gran 0x06 io [DEBUG] PCI: 00:00:04.0 10 <- [0x00000000cedb8000 - 0x00000000cedbffff] size 0x00008000 gran 0x0f mem64 [DEBUG] PCI: 00:00:14.0 10 <- [0x00000000cedd0000 - 0x00000000ceddffff] size 0x00010000 gran 0x10 mem64 [DEBUG] PCI: 00:00:14.2 10 <- [0x00000000cedaf000 - 0x00000000cedaffff] size 0x00001000 gran 0x0c mem64 [DEBUG] PCI: 00:00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 01 io [DEBUG] PCI: 00:00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 01 prefmem [DEBUG] PCI: 00:00:1c.0 20 <- [0x00000000cef00000 - 0x00000000ceffffff] size 0x00100000 gran 0x14 seg 00 bus 01 mem [DEBUG] PCI: 00:01:00.0 10 <- [0x00000000cef00000 - 0x00000000cef03fff] size 0x00004000 gran 0x0e mem64 [DEBUG] PCI: 00:00:1d.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 02 io [DEBUG] PCI: 00:00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 prefmem [DEBUG] PCI: 00:00:1d.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 mem [DEBUG] PCI: 00:00:1d.2 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 03 io [DEBUG] PCI: 00:00:1d.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 03 prefmem [DEBUG] PCI: 00:00:1d.2 20 <- [0x00000000cee00000 - 0x00000000ceefffff] size 0x00100000 gran 0x14 seg 00 bus 03 mem [DEBUG] PCI: 00:03:00.0 10 <- [0x00000000cee00000 - 0x00000000cee03fff] size 0x00004000 gran 0x0e mem64 [ERROR] PNP: 00ff.1 missing set_resources [ERROR] PNP: 00ff.2 missing set_resources [DEBUG] LPC: enabling default decode range LPC_IOE_EC_62_66 [DEBUG] LPC: enabling default decode range LPC_IOE_EC_62_66 [DEBUG] PCI: 00:00:1f.2 10 <- [0x00000000cedb4000 - 0x00000000cedb7fff] size 0x00004000 gran 0x0e mem [DEBUG] PCI: 00:00:1f.3 10 <- [0x00000000cedb0000 - 0x00000000cedb3fff] size 0x00004000 gran 0x0e mem64 [DEBUG] PCI: 00:00:1f.3 20 <- [0x00000000cedc0000 - 0x00000000cedcffff] size 0x00010000 gran 0x10 mem64 [DEBUG] PCI: 00:00:1f.6 10 <- [0x00000000cede0000 - 0x00000000cedfffff] size 0x00020000 gran 0x11 mem [INFO ] Done setting resources. [INFO ] Done allocating resources. [DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 2 / 0 ms [INFO ] LAPIC 0x0 in XAPIC mode. [DEBUG] MTRR: Physical address space: [DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6 [DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0 [DEBUG] 0x00000000000c0000 - 0x000000007affffff size 0x7af40000 type 6 [DEBUG] 0x000000007b000000 - 0x00000000cfffffff size 0x55000000 type 0 [DEBUG] 0x00000000d0000000 - 0x00000000dfffffff size 0x10000000 type 1 [DEBUG] 0x00000000e0000000 - 0x00000000ffffffff size 0x20000000 type 0 [DEBUG] 0x0000000100000000 - 0x000000107fffffff size 0xf80000000 type 6 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606 [DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 39 bits [DEBUG] MTRR: default type WB/UC MTRR counts: 6/9. [DEBUG] MTRR: WB selected as default type. [DEBUG] MTRR: 0 base 0x000000007b000000 mask 0x0000007fff000000 type 0 [DEBUG] MTRR: 1 base 0x000000007c000000 mask 0x0000007ffc000000 type 0 [DEBUG] MTRR: 2 base 0x0000000080000000 mask 0x0000007fc0000000 type 0 [DEBUG] MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 0 [DEBUG] MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 1 [DEBUG] MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0 [INFO ] LAPIC 0x1 in XAPIC mode. [INFO ] LAPIC 0x2 in XAPIC mode. [INFO ] LAPIC 0x3 in XAPIC mode. [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x250 0x0606060606060606 [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x258 0x0606060606060606 [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x259 0x0000000000000000 [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x268 0x0606060606060606 [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x269 0x0606060606060606 [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26a 0x0606060606060606 [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26b 0x0606060606060606 [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26c 0x0606060606060606 [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26d 0x0606060606060606 [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26e 0x0606060606060606 [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26f 0x0606060606060606 [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x250 0x0606060606060606 [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x258 0x0606060606060606 [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x259 0x0000000000000000 [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x268 0x0606060606060606 [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x269 0x0606060606060606 [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26a 0x0606060606060606 [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26b 0x0606060606060606 [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26c 0x0606060606060606 [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26d 0x0606060606060606 [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26e 0x0606060606060606 [DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26f 0x0606060606060606 [INFO ] LAPIC 0x7 in XAPIC mode. [INFO ] LAPIC 0x6 in XAPIC mode. [INFO ] LAPIC 0x5 in XAPIC mode. [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x250 0x0606060606060606 [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x258 0x0606060606060606 [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x259 0x0000000000000000 [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x268 0x0606060606060606 [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x269 0x0606060606060606 [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26a 0x0606060606060606 [DEBUG] apic_id 0x7: MTRR: Fixed MSR 0x250 0x0606060606060606 [DEBUG] apic_id 0x2 setup mtrr for CPU physical address size: 39 bits [DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x250 0x0606060606060606 [DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x258 0x0606060606060606 [DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x259 0x0000000000000000 [DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x268 0x0606060606060606 [DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x269 0x0606060606060606 [DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x26a 0x0606060606060606 [DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x26b 0x0606060606060606 [DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x26c 0x0606060606060606 [DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x26d 0x0606060606060606 [DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x26e 0x0606060606060606 [DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x26f 0x0606060606060606 [DEBUG] apic_id 0x7: MTRR: Fixed MSR 0x258 0x0606060606060606 [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26b 0x0606060606060606 [DEBUG] apic_id 0x5: MTRR: Fixed MSR 0x250 0x0606060606060606 [DEBUG] apic_id 0x5: MTRR: Fixed MSR 0x258 0x0606060606060606 [DEBUG] apic_id 0x5: MTRR: Fixed MSR 0x259 0x0000000000000000 [DEBUG] apic_id 0x5: MTRR: Fixed MSR 0x268 0x0606060606060606 [INFO ] LAPIC 0x4 in XAPIC mode. [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26c 0x0606060606060606 [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26d 0x0606060606060606 [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26e 0x0606060606060606 [DEBUG] apic_id 0x7: MTRR: Fixed MSR 0x259 0x0000000000000000 [DEBUG] apic_id 0x7: MTRR: Fixed MSR 0x268 0x0606060606060606 [DEBUG] apic_id 0x7: MTRR: Fixed MSR 0x269 0x0606060606060606 [DEBUG] apic_id 0x7: MTRR: Fixed MSR 0x26a 0x0606060606060606 [DEBUG] apic_id 0x7: MTRR: Fixed MSR 0x26b 0x0606060606060606 [DEBUG] apic_id 0x7: MTRR: Fixed MSR 0x26c 0x0606060606060606 [DEBUG] apic_id 0x1 setup mtrr for CPU physical address size: 39 bits [DEBUG] apic_id 0x5: MTRR: Fixed MSR 0x269 0x0606060606060606 [DEBUG] apic_id 0x5: MTRR: Fixed MSR 0x26a 0x0606060606060606 [DEBUG] apic_id 0x5: MTRR: Fixed MSR 0x26b 0x0606060606060606 [DEBUG] apic_id 0x5: MTRR: Fixed MSR 0x26c 0x0606060606060606 [DEBUG] apic_id 0x5: MTRR: Fixed MSR 0x26d 0x0606060606060606 [DEBUG] apic_id 0x5: MTRR: Fixed MSR 0x26e 0x0606060606060606 [DEBUG] apic_id 0x5: MTRR: Fixed MSR 0x26f 0x0606060606060606 [DEBUG] apic_id 0x7: MTRR: Fixed MSR 0x26d 0x0606060606060606 [DEBUG] apic_id 0x7: MTRR: Fixed MSR 0x26e 0x0606060606060606 [DEBUG] apic_id 0x7: MTRR: Fixed MSR 0x26f 0x0606060606060606 [DEBUG] apic_id 0x3 setup mtrr for CPU physical address size: 39 bits [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26f 0x0606060606060606 [DEBUG] apic_id 0x5 setup mtrr for CPU physical address size: 39 bits [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x250 0x0606060606060606 [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x258 0x0606060606060606 [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x259 0x0000000000000000 [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x268 0x0606060606060606 [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x269 0x0606060606060606 [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26a 0x0606060606060606 [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26b 0x0606060606060606 [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26c 0x0606060606060606 [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26d 0x0606060606060606 [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26e 0x0606060606060606 [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26f 0x0606060606060606 [DEBUG] apic_id 0x6 setup mtrr for CPU physical address size: 39 bits [DEBUG] apic_id 0x7 setup mtrr for CPU physical address size: 39 bits [DEBUG] apic_id 0x4 setup mtrr for CPU physical address size: 39 bits [DEBUG] MTRR: TEMPORARY Physical address space: [DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6 [DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0 [DEBUG] 0x00000000000c0000 - 0x000000007affffff size 0x7af40000 type 6 [DEBUG] 0x000000007b000000 - 0x00000000feffffff size 0x84000000 type 0 [DEBUG] 0x00000000ff000000 - 0x00000000ffffffff size 0x01000000 type 5 [DEBUG] 0x0000000100000000 - 0x000000107fffffff size 0xf80000000 type 6 [DEBUG] MTRR: default type WB/UC MTRR counts: 10/9. [DEBUG] MTRR: UC selected as default type. [DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6 [DEBUG] MTRR: 1 base 0x000000007b000000 mask 0x0000007fff000000 type 0 [DEBUG] MTRR: 2 base 0x000000007c000000 mask 0x0000007ffc000000 type 0 [DEBUG] MTRR: 3 base 0x00000000ff000000 mask 0x0000007fff000000 type 5 [DEBUG] MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6 [DEBUG] MTRR: 5 base 0x0000000200000000 mask 0x0000007e00000000 type 6 [DEBUG] MTRR: 6 base 0x0000000400000000 mask 0x0000007c00000000 type 6 [DEBUG] MTRR: 7 base 0x0000000800000000 mask 0x0000007800000000 type 6 [DEBUG] MTRR: 8 base 0x0000001000000000 mask 0x0000007f80000000 type 6 [DEBUG] MTRR check [DEBUG] Fixed MTRRs : Enabled [DEBUG] Variable MTRRs: Enabled [DEBUG] BS: BS_DEV_ENABLE entry times (exec / console): 1 / 0 ms [INFO ] Enabling resources... [DEBUG] PCI: 00:00:00.0 subsystem <- 8086/5914 [DEBUG] PCI: 00:00:00.0 cmd <- 06 [DEBUG] PCI: 00:00:02.0 subsystem <- 8086/5917 [DEBUG] PCI: 00:00:02.0 cmd <- 03 [DEBUG] PCI: 00:00:04.0 subsystem <- 8086/1903 [DEBUG] PCI: 00:00:04.0 cmd <- 02 [DEBUG] PCI: 00:00:14.0 subsystem <- 8086/9d2f [DEBUG] PCI: 00:00:14.0 cmd <- 02 [DEBUG] PCI: 00:00:14.2 subsystem <- 8086/9d31 [DEBUG] PCI: 00:00:14.2 cmd <- 02 [DEBUG] PCI: 00:00:1c.0 bridge ctrl <- 0013 [DEBUG] PCI: 00:00:1c.0 subsystem <- 8086/9d16 [DEBUG] PCI: 00:00:1c.0 cmd <- 06 [DEBUG] PCI: 00:00:1d.0 bridge ctrl <- 0013 [DEBUG] PCI: 00:00:1d.0 subsystem <- 8086/9d18 [DEBUG] PCI: 00:00:1d.0 cmd <- 00 [DEBUG] PCI: 00:00:1d.2 bridge ctrl <- 0013 [DEBUG] PCI: 00:00:1d.2 subsystem <- 8086/9d1a [DEBUG] PCI: 00:00:1d.2 cmd <- 06 [DEBUG] PCI: 00:00:1f.0 subsystem <- 8086/9d4e [DEBUG] PCI: 00:00:1f.0 cmd <- 07 [DEBUG] PCI: 00:00:1f.2 subsystem <- 8086/9d21 [DEBUG] PCI: 00:00:1f.2 cmd <- 02 [DEBUG] PCI: 00:00:1f.3 subsystem <- 8086/9d71 [DEBUG] PCI: 00:00:1f.3 cmd <- 02 [DEBUG] PCI: 00:00:1f.6 subsystem <- 8086/15d7 [DEBUG] PCI: 00:00:1f.6 cmd <- 02 [DEBUG] PCI: 00:01:00.0 cmd <- 02 [DEBUG] PCI: 00:03:00.0 cmd <- 02 [INFO ] done. [INFO ] Initializing devices... [DEBUG] PCI: 00:00:00.0 init [INFO ] CPU TDP = 15 Watts [INFO ] CPU PL1 = 15 Watts [INFO ] CPU PL2 = 18 Watts [DEBUG] PCI: 00:00:00.0 init finished in 1 msecs [DEBUG] PCI: 00:00:02.0 init [INFO ] CBFS: Found 'vbt.bin' @0x9c880 size 0x467 in mcache @0x7abdd1e4 [INFO ] Found a VBT of 4106 bytes [INFO ] GMA: Found VBT in CBFS [INFO ] GMA: Found valid VBT in CBFS [INFO ] framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32 [INFO ] x_res x y_res: 1920 x 1080, size: 8294400 at 0xd0000000 [DEBUG] PCI: 00:00:02.0 init finished in 1044 msecs [DEBUG] PCI: 00:00:04.0 init [DEBUG] PCI: 00:00:04.0 init finished in 0 msecs [DEBUG] PCI: 00:00:14.0 init [DEBUG] PCI: 00:00:14.0 init finished in 0 msecs [DEBUG] PCI: 00:00:14.2 init [DEBUG] PCI: 00:00:14.2 init finished in 0 msecs [DEBUG] PCI: 00:00:1c.0 init [DEBUG] Initializing PCH PCIe bridge. [DEBUG] PCI: 00:00:1c.0 init finished in 0 msecs [DEBUG] PCI: 00:00:1d.0 init [DEBUG] Initializing PCH PCIe bridge. [DEBUG] PCI: 00:00:1d.0 init finished in 0 msecs [DEBUG] PCI: 00:00:1d.2 init [DEBUG] Initializing PCH PCIe bridge. [DEBUG] PCI: 00:00:1d.2 init finished in 0 msecs [DEBUG] PCI: 00:00:1f.0 init [DEBUG] IOAPIC: Initializing IOAPIC at fec00000 [DEBUG] IOAPIC: ID = 0x00 [DEBUG] IOAPIC: 120 interrupts [DEBUG] IOAPIC: Clearing IOAPIC at fec00000 [DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00 [DEBUG] PCI: 00:00:1f.0 init finished in 0 msecs [DEBUG] PCI: 00:00:1f.2 init [DEBUG] RTC Init [INFO ] Set power on after power failure. [WARN ] PMC: Duplicate GPE DW register values detected; using default GPE route from MISCCFG register [DEBUG] apm_control: Disabling ACPI. [DEBUG] APMC done. [DEBUG] Disabling Deep S3 [DEBUG] Disabling Deep S3 [DEBUG] Disabling Deep S4 [DEBUG] Disabling Deep S4 [DEBUG] Disabling Deep S5 [DEBUG] Disabling Deep S5 [DEBUG] PCI: 00:00:1f.2 init finished in 0 msecs [DEBUG] PCI: 00:00:1f.3 init [DEBUG] azalia_audio: base = 0xcedb0000 [DEBUG] azalia_audio: codec_mask = 0x01 [DEBUG] azalia_audio: initializing codec #0... [DEBUG] azalia_audio: - vendor/device id: 0x10ec0257 [DEBUG] azalia_audio: - verb size: 44 [DEBUG] azalia_audio: - verb loaded [DEBUG] PCI: 00:00:1f.3 init finished in 5 msecs [DEBUG] PCI: 00:00:1f.6 init [DEBUG] PCI: 00:00:1f.6 init finished in 0 msecs [DEBUG] PCI: 00:01:00.0 init [DEBUG] PCI: 00:01:00.0 init finished in 0 msecs [DEBUG] PCI: 00:03:00.0 init [DEBUG] PCI: 00:03:00.0 init finished in 0 msecs [DEBUG] PNP: 00ff.2 init [DEBUG] PNP: 00ff.2 init finished in 0 msecs [INFO ] Devices initialized [DEBUG] BS: BS_DEV_INIT run times (exec / console): 1052 / 0 ms [INFO ] tlcl2_send_startup: Startup return code is 0x0 [INFO ] TPM: setup succeeded [DEBUG] BS: BS_DEV_INIT exit times (exec / console): 10 / 0 ms [INFO ] Finalize devices... [DEBUG] PCI: 00:00:02.0 final [DEBUG] PCI: 00:00:1f.2 final [DEBUG] PCI: 00:00:1f.3 final [INFO ] Devices finalized [INFO ] CBFS: Found 'fallback/dsdt.aml' @0x98900 size 0x3f2e in mcache @0x7abdd1b8 [WARN ] CBFS: 'fallback/slic' not found. [INFO ] ACPI: Writing ACPI tables at 7aa0c000. [DEBUG] ACPI: * FACS [DEBUG] SCI is IRQ 9, GSI 9 [DEBUG] ACPI: * FACP [DEBUG] ACPI: added table 1/32, length now 44 [DEBUG] Found 1 CPU(s) with 4/8 physical/logical core(s) each. [DEBUG] PCI space above 4GB MMIO is at 0x1080000000, len = 0x6f80000000 [DEBUG] Empty min sleep state array returned [INFO ] Returning default LPI constraint package [INFO ] \_SB.PCI0.PEPD: Intel Power Engine Plug-in [INFO ] ACPI: * H8 [INFO ] H8: BDC detection not implemented. Assuming BDC installed [INFO ] H8: WWAN detection not implemented. Assuming WWAN installed [INFO ] \_SB_.PCI0.TPM: LPC TPM PNP: 0c31.0 [INFO ] \_SB.PCI0.RP01.WF00: PCI: 00:01:00.0 [DEBUG] ACPI: * SSDT [DEBUG] ACPI: added table 2/32, length now 52 [DEBUG] ACPI: * MCFG [DEBUG] ACPI: added table 3/32, length now 60 [DEBUG] TPM2 log created at 0x7a9fc000 [DEBUG] ACPI: * TPM2 [DEBUG] ACPI: added table 4/32, length now 68 [DEBUG] ACPI: * LPIT [DEBUG] ACPI: added table 5/32, length now 76 [DEBUG] IOAPIC: 120 interrupts [DEBUG] SCI is IRQ 9, GSI 9 [DEBUG] ACPI: * APIC [DEBUG] ACPI: added table 6/32, length now 84 [DEBUG] current = 7aa112a0 [DEBUG] ACPI: * DMAR [DEBUG] ACPI: added table 7/32, length now 92 [DEBUG] acpi_write_dbg2_pci_uart: Device not found [DEBUG] ACPI: * HPET [DEBUG] ACPI: added table 8/32, length now 100 [INFO ] ACPI: done. [DEBUG] ACPI tables: 21360 bytes. [DEBUG] smbios_write_tables: 7a9f4000 [DEBUG] SMBIOS firmware version is set to coreboot_version: '/nix/store/jym9wgzni8fvcdmc6s07zz7p563kg8dj-coreboot' [INFO ] Create SMBIOS type 16 [INFO ] Create SMBIOS type 17 [INFO ] Create SMBIOS type 20 [INFO ] PCI: 00:01:00.0 (unknown) [DEBUG] SMBIOS tables: 1094 bytes. [DEBUG] Writing table forward entry at 0x00000500 [DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 853b [DEBUG] Writing coreboot table at 0x7aa30000 [DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES [DEBUG] 1. 0000000000001000-000000000009ffff: RAM [DEBUG] 2. 00000000000a0000-00000000000f5fff: RESERVED [DEBUG] 3. 00000000000f6000-00000000000f6fff: CONFIGURATION TABLES [DEBUG] 4. 00000000000f7000-00000000000fffff: RESERVED [DEBUG] 5. 0000000000100000-000000007a9f3fff: RAM [DEBUG] 6. 000000007a9f4000-000000007aa7afff: CONFIGURATION TABLES [DEBUG] 7. 000000007aa7b000-000000007abcdfff: RAMSTAGE [DEBUG] 8. 000000007abce000-000000007affffff: CONFIGURATION TABLES [DEBUG] 9. 000000007b000000-000000007fffffff: RESERVED [DEBUG] 10. 00000000e0000000-00000000efffffff: RESERVED [DEBUG] 11. 00000000fd000000-00000000fe00ffff: RESERVED [DEBUG] 12. 00000000fed10000-00000000fed19fff: RESERVED [DEBUG] 13. 00000000fed40000-00000000fed44fff: RESERVED [DEBUG] 14. 00000000fed80000-00000000fed84fff: RESERVED [DEBUG] 15. 00000000fed90000-00000000fed91fff: RESERVED [DEBUG] 16. 0000000100000000-000000107fffffff: RAM [INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x1000000 [DEBUG] Wrote coreboot table at: 0x7aa30000, 0x4dc bytes, checksum e27a [DEBUG] coreboot table: 1268 bytes. [DEBUG] IMD ROOT 0. 0x7afff000 0x00001000 [DEBUG] IMD SMALL 1. 0x7affe000 0x00001000 [DEBUG] FSP MEMORY 2. 0x7abfe000 0x00400000 [DEBUG] CONSOLE 3. 0x7abde000 0x00020000 [DEBUG] RO MCACHE 4. 0x7abdd000 0x00000468 [DEBUG] TIME STAMP 5. 0x7abdc000 0x00000910 [DEBUG] MEM INFO 6. 0x7abdb000 0x00000f48 [DEBUG] AFTER CAR 7. 0x7abce000 0x0000d000 [DEBUG] RAMSTAGE 8. 0x7aa7a000 0x00154000 [DEBUG] REFCODE 9. 0x7aa4c000 0x0002e000 [DEBUG] SMM BACKUP 10. 0x7aa3c000 0x00010000 [DEBUG] IGD OPREGION11. 0x7aa38000 0x00003200 [DEBUG] COREBOOT 12. 0x7aa30000 0x00008000 [DEBUG] ACPI 13. 0x7aa0c000 0x00024000 [DEBUG] TPM2 TCGLOG14. 0x7a9fc000 0x00010000 [DEBUG] SMBIOS 15. 0x7a9f4000 0x00008000 [DEBUG] IMD small region: [DEBUG] IMD ROOT 0. 0x7affec00 0x00000400 [DEBUG] FSP RUNTIME 1. 0x7affebe0 0x00000004 [DEBUG] FMAP 2. 0x7affea80 0x0000015e [DEBUG] POWER STATE 3. 0x7affea40 0x00000040 [DEBUG] FSPM VERSION 4. 0x7affea20 0x00000004 [DEBUG] ROMSTAGE 5. 0x7affea00 0x00000004 [DEBUG] ROMSTG STCK 6. 0x7affe940 0x000000a8 [DEBUG] ACPI GNVS 7. 0x7affe900 0x00000038 [DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 3 / 0 ms [INFO ] CBFS: Found 'fallback/payload' @0x3f00c0 size 0x11b0f in mcache @0x7abdd3f8 [DEBUG] Checking segment from ROM address 0xffb002ec [DEBUG] Payload being loaded at below 1MiB without region being marked as RAM usable. [DEBUG] Checking segment from ROM address 0xffb00308 [DEBUG] Loading segment from ROM address 0xffb002ec [DEBUG] code (compression=1) [DEBUG] New segment dstaddr 0x000ddd40 memsize 0x222c0 srcaddr 0xffb00324 filesize 0x11ad7 [DEBUG] Loading Segment: addr: 0x000ddd40 memsz: 0x00000000000222c0 filesz: 0x0000000000011ad7 [DEBUG] using LZMA [DEBUG] Loading segment from ROM address 0xffb00308 [DEBUG] Entry Point 0x000fd254 [DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 14 / 0 ms [DEBUG] Finalizing chipset. [WARN ] HECI: CSE device 16.0 is disabled [DEBUG] apm_control: Finalizing SMM. [DEBUG] APMC done. [DEBUG] mp_park_aps done after 0 msecs. [DEBUG] Jumping to boot code at 0x000fd254(0x7aa30000) SeaBIOS (version 1.17.0-snowboot) BUILD: gcc: (GCC) 14.3.0 binutils: (GNU Binutils) 2.44 Found coreboot cbmem console @ 7abde000 Found mainboard LENOVO T480 Relocating init from 0x000df4c0 to 0x799e67c0 (size 55200) Found CBFS header at 0xff71022c multiboot: eax=7aabc65c, ebx=7aabc624 boot order: 1: /rom@img/GRUB 2: Found 14 PCI devices (max PCI bus is 03) Copying SMBIOS from 0x7a9f4000 to 0x000f5d20 Copying SMBIOS 3.0 from 0x7a9f4020 to 0x000f5d00 Copying ACPI RSDP from 0x7aa0c000 to 0x000f5cd0 table(50434146)=0x7aa101c0 (via xsdt) Using pmtimer, ioport 0x1808 table(324d5054)=0x7aa11110 (via xsdt) WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! Scan for VGA option rom WARNING - Timeout at wait_reg8:81! Running option rom at c000:0003 pmm call arg1=0 Turning on vga text mode console SeaBIOS (version 1.17.0-snowboot) PCI: XHCI at 00:14.0 (mmio 0xcedd0000) XHCI init: regs @ 0xcedd0000, 18 ports, 64 slots, 32 byte contexts XHCI protocol USB 2.00, 12 ports (offset 1), def 3011 XHCI protocol USB 3.00, 6 ports (offset 13), def 3000 XHCI extcap 0xc0 @ 0xcedd8070 XHCI extcap 0x1 @ 0xcedd846c XHCI extcap 0xc6 @ 0xcedd84f4 XHCI extcap 0xc7 @ 0xcedd8500 XHCI extcap 0xc2 @ 0xcedd8600 XHCI extcap 0xa @ 0xcedd8700 XHCI extcap 0xc3 @ 0xcedd8740 XHCI extcap 0xc4 @ 0xcedd8800 XHCI extcap 0xc5 @ 0xcedd8900 Searching bootorder for: HALT Found 0 lpt ports Found 0 serial ports Searching bootorder for: /rom@img/GRUB Searching bootorder for: /rom@img/GRUB-libreboot Searching bootorder for: /rom@img/memtest86+ Searching bootorder for: /pci@i0cf8/pci-bridge@1d,2/*@0 XHCI port #15: 0x00281203, powered, enabled, pls 0, speed 4 [Super] Searching bootorder for: /pci@i0cf8/usb@14/storage@3/*@0/*@0,0 Searching bootorder for: /pci@i0cf8/usb@14/usb-*@3 USB MSC vendor='Generic-' product='SD/MMC' rev='1.00' type=0 removable=1 Device reports MEDIUM NOT PRESENT - 2 tries left Device reports MEDIUM NOT PRESENT - 1 tries left Device reports MEDIUM NOT PRESENT - 0 tries left scsi_is_ready returned -1 Unable to configure USB MSC drive. Unable to configure USB MSC device. XHCI port #9: 0x00200603, powered, enabled, pls 0, speed 1 [Full] XHCI port #8: 0x00200e03, powered, enabled, pls 0, speed 3 [High] XHCI port #7: 0x00200603, powered, enabled, pls 0, speed 1 [Full] xhci_realloc_pipe: reconf ctl endpoint pkt size: 8 -> 64 XHCI port #6: 0x00200e03, powered, enabled, pls 0, speed 3 [High] XHCI no devices found PS2 keyboard initialized All threads complete. Scan for option roms Press ESC for boot menu. WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! WARNING - Timeout at wait_reg8:81! Searching bootorder for: HALT drive 0x000f5c80: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=3907029168 Space available for UMB: c7000-eb800, f5540-f5c80 Returned 16592896 bytes of ZoneHigh e820 map has 12 items: 0: 0000000000000000 - 000000000009fc00 = 1 RAM 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED 3: 0000000000100000 - 000000007a9c7000 = 1 RAM 4: 000000007a9c7000 - 0000000080000000 = 2 RESERVED 5: 00000000e0000000 - 00000000f0000000 = 2 RESERVED 6: 00000000fd000000 - 00000000fe010000 = 2 RESERVED 7: 00000000fed10000 - 00000000fed1a000 = 2 RESERVED 8: 00000000fed40000 - 00000000fed45000 = 2 RESERVED 9: 00000000fed80000 - 00000000fed85000 = 2 RESERVED 10: 00000000fed90000 - 00000000fed92000 = 2 RESERVED 11: 0000000100000000 - 0000001080000000 = 1 RAM enter handle_19: NULL Booting from CBFS... Run img/GRUB Calling addr 0x00009000
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