hi Joursoir, the attached log does not appear to be UTF-8 (or anything else my editor recognizes)
-Matt On Wed, Dec 17, 2025 at 5:55 AM Joursoir <[email protected]> wrote: > Hey Matt, > > Sure! I attached the debug output (UTF-8 encoding) from coreboot.rom > built with the following criteria. > > NDA PSP binaries used: > * TypeId0x01_PspBootLoader_CZN.sbin > * TypeId0x02_PspOS_CZN.sbin > * TypeId0x28_PspSystemDriver_CZN.sbin > > APCBs: Using my own APCBs (instances 0/10/18). I have not modified them > in any way, these exact APCBs work with the proprietary firmware. > > All other blobs are taken from the `amd_blobs` repo as you suggested. > > -- > Joursoir > > On Mon, 15 Dec 2025 11:04:13 -0600 > Matt DeVillier <[email protected]> wrote: > > > hi Joursoir, > > > > try using your own ABL (for sodimm) and APCBs, but everything else > > from the amd_blobs repo. That should get you booting at least. > > posting a link to a full log might help better understand the issue, > > since you appear to be getting some debug output. > > > > cheers, > > Matt > > > > On Mon, Dec 15, 2025 at 5:18 AM Joursoir <[email protected]> wrote: > > > > > Thank you for the response. It took me a while to reply because I > > > have been testing different combinations of PSP images, as you > > > suggested that mixing different PSP firmware is not expected to > > > work. > > > > > > >From the logs I can see: > > > [DEBUG] Family_Model: 00a50f00 > > > > > > So this is Cezanne silicon, not Renoir. > > > > > > Unfortunately, I have not been able to boot my board using the > > > default binaries available under amd_blobs, so I am currently > > > forced to use NDA binaries. Also note that the board uses SO-DIMM > > > memory rather than soldered-down memory. > > > > > > I have tried to replace as many binaries as possible with default > > > ones. However, the following PSP components appear to be > > > irreplaceable on my platform: > > > * TypeId0x01_PspBootLoader_AB_Stage1_CZN.sbin > > > * TypeId0x01_PspBootLoader_CZN.sbin > > > * TypeId0x02_PspOS_CZN.sbin > > > > > > At this point I am not sure what else to try. Any ideas would be > > > appreciated. > > > > > > On Thu, 4 Dec 2025 15:00:45 +0100 > > > Felix Held <[email protected]> wrote: > > > > > > > Hi, > > > > > > > > The Cezanne FSP binaries are only expected to work on Cezanne > > > > silicon; not sure if you're trying this on Renoir or Cezanne. The > > > > Cezanne FSP expects that the corresponding Cezanne PSP firmware > > > > from the same repo is used; mixing some different PSP firmware > > > > with the Cezanne FSP isn't expected to work. I don't remember if > > > > in that case things will fail inside FSP-M or FSP-S though. This > > > > isn't exactly an FSP issue, but a combining mismatching parts > > > > issue. Only the soldered-down memory configuration is tested with > > > > Cezanne; this shouldn't result in the symptoms you described > > > > though. Both the Chromebooks and the Cezanne reference board > > > > worked when I tried that the last time, but that was quite a > > > > while ago. > > > > > > > > Regards, > > > > Felix > > > > _______________________________________________ > > > > coreboot mailing list -- [email protected] > > > > To unsubscribe send an email to [email protected] > > > > > > -- > > > Joursoir > > > _______________________________________________ > > > coreboot mailing list -- [email protected] > > > To unsubscribe send an email to [email protected] > > > > >
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