We are pleased to announce the following papers will appear at
the Workshop on Cryptographic Hardware and Embedded Systems.
Information about the conference is found at 
http://ece.wpi.edu/Research/crypt/ches.

A. Shamir
Factoring large numbers with the TWINKLE device

J. H. Silverman.
Fast multiplication in finite fields GF(2^n)

B. Kaliski and M. Liskov
Efficient finite field basis conversion involving dual bases

H. Wu, M. A. Hasan, and I. F. Blake.
Highly regular architectures for finite field computation using 
redundant basis

H. Wu
Low complexity bit-parallel finite field arithmetic using polynomial 
basis

K. Itoh, M. Takenaka, N. Torii, S. Temma, and Y. Kurihara
Fast implementation of public-key cryptography

P. J. Lee, E. J. Lee, and Y. D. Kim
How to implement cost-effective and secure public key cryptosystems

J. Lopez and R. Dahab
Fast multiplication on elliptic curves over GF(2^m) without 
precomputation

L. Gao, S. Shrivastava, and G. E. Sobelman
Elliptic curve scalar multiplier design using FPGAs

Y. Han, J. Zhang, and P.-C. Tan
Direct computation for elliptic curve cryptosystems

J.-S. Coron
Resistance against differential power analysis attacks for 
elliptic curve cryptosystems

L. Goubin and J. Patarin
DES and differential power analysis

P. Fahn and P. Pearson
IPA: A new class of power attacks

T. S. Messerges, E. A. Dabbish, and R. H. Sloan
Power analysis attacks of modular exponentiation in smartcards

H. Handschuh, P. Paillier, and J. Stern
Probing attacks on tamper-resistant devices

V. Bagini and M. Bucci
A design of reliable true random number generator for 
cryptographic applications

D. Maher and B. Rance
Random number generators founded on signal and information theory

W. P. Choi and L. M. Cheng
Modelling the crypto-processor from design to synthesis

R. R. Taylor and S. C. Goldsteiny
A high-performance flexible architecture for cryptography

A. F. Tenca and C. K. Koc
A scalable architecture for Montgomery multiplication

E. Mosanya, C. Teuscher, H. F. Restrepo, P. Galley, and E. Sanchez
CryptoBooster: A reconfigurable and modular cryptographic coprocessor

I. Hamer and P. Chow
DES cracking on the Transmogrifier 2a

M. Hartmann, S. Paulus, and T. Takagi
NICE - New Ideal Coset Encryption -

D. C. Wilcox, L. G. Pierson, P. J. Robertson, and E. L. Witzke
A DES ASIC suitable for network encryption at 10 Gbps and beyond

E. Hong, J.-H. Chung, and C. H. Lim
Hardware design and performance estimation of the 128-bit block 
cipher cRYPTON

T. Horvath
Arithmetic design for permutation groups

O. Jung and C. Ruland
Encryption with statistical self-synchronization in synchronous 
broadband networks

Invited Talks:
--------------

Brian Snow, National Security Agency, USA
We Need Assurance

Eberhard von Faber, Debis IT Security Services, Germany
Security Evaluation Schemes for the Public and Private
Market with a Focus on Smart Card Systems

Dale Hopkins, Compaq - Atalla, USA
Design of Hardware Encryption Systems for e-Commerce Applications

Colin D. Walter, Computation Department - UMIST, U.K.
An Overview of Montgomery's Multiplication Technique:
How to make it Smaller and Faster

David Naccache, Gemplus, France
Significance Tests and Hardware Leakage

-------------------------------------------------------
Workshop on Cryptographic Hardware and Embedded Systems
     Worcester, Massachusetts, August 12-13, 1999
-------------------------------------------------------
Information:    http://ece.wpi.edu/Research/crypt/ches
E-Mail:         [EMAIL PROTECTED]
Program Chairs: Cetin Kaya Koc   & Christof Paar
                [EMAIL PROTECTED] & [EMAIL PROTECTED]
-------------------------------------------------------



Reply via email to