Sat Feb 14 21:51:58 PST 2009 [email protected]
* NCG: Split up the native code generator into arch specific modules
- nativeGen/Instruction defines a type class for a generic
instruction set. Each of the instruction sets we have,
X86, PPC and SPARC are instances of it.
- The register alloctors use this type class when they need
info about a certain register or instruction, such as
regUsage, mkSpillInstr, mkJumpInstr, patchRegs..
- nativeGen/Platform defines some data types enumerating
the architectures and operating systems supported by the
native code generator.
- DynFlags now keeps track of the current build platform, and
the PositionIndependentCode module uses this to decide what
to do instead of relying of #ifdefs.
- It's not totally retargetable yet. Some info info about the
build target is still hardwired, but I've tried to contain
most of it to a single module, TargetRegs.
- Moved the SPILL and RELOAD instructions into LiveInstr.
- Reg and RegClass now have their own modules, and are shared
across all architectures.
M ./compiler/ghc.cabal.in -8 +16
M ./compiler/main/DynFlags.hs +3
A ./compiler/nativeGen/Alpha/CodeGen.hs
M ./compiler/nativeGen/Alpha/Instr.hs -3 +5
A ./compiler/nativeGen/ArchReg.hs
M ./compiler/nativeGen/AsmCodeGen.lhs -35 +104
R ./compiler/nativeGen/Instrs.hs
A ./compiler/nativeGen/Instruction.hs
R ./compiler/nativeGen/MachCodeGen.hs
M ./compiler/nativeGen/NCGMonad.hs -39 +80
A ./compiler/nativeGen/PIC.hs
A ./compiler/nativeGen/PPC/CodeGen.hs
A ./compiler/nativeGen/PPC/Cond.hs
M ./compiler/nativeGen/PPC/Instr.hs -37 +322
M ./compiler/nativeGen/PPC/Ppr.hs -8 +120
M ./compiler/nativeGen/PPC/RegInfo.hs -267 +48
M ./compiler/nativeGen/PPC/Regs.hs -71 +31
A ./compiler/nativeGen/Platform.hs
R ./compiler/nativeGen/PositionIndependentCode.hs
R ./compiler/nativeGen/PprMach.hs
A ./compiler/nativeGen/Reg.hs
M ./compiler/nativeGen/RegAlloc/Graph/Coalesce.hs -6 +17
M ./compiler/nativeGen/RegAlloc/Graph/Main.hs -22 +34
M ./compiler/nativeGen/RegAlloc/Graph/Spill.hs -12 +34
M ./compiler/nativeGen/RegAlloc/Graph/SpillClean.hs -34 +61
M ./compiler/nativeGen/RegAlloc/Graph/SpillCost.hs -17 +31
M ./compiler/nativeGen/RegAlloc/Graph/Stats.hs -104 +39
A ./compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
M ./compiler/nativeGen/RegAlloc/Linear/Base.hs -1 +1
M ./compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs -1 +5
M ./compiler/nativeGen/RegAlloc/Linear/JoinToTargets.hs -20 +27
M ./compiler/nativeGen/RegAlloc/Linear/Main.hs -54 +63
M ./compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs -1 +3
M ./compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs -1 +3
M ./compiler/nativeGen/RegAlloc/Linear/StackMap.hs -1 +1
M ./compiler/nativeGen/RegAlloc/Linear/State.hs -7 +9
M ./compiler/nativeGen/RegAlloc/Linear/Stats.hs -5 +10
M ./compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs -1 +3
M ./compiler/nativeGen/RegAlloc/Liveness.hs -92 +172
R ./compiler/nativeGen/RegAllocInfo.hs
A ./compiler/nativeGen/RegClass.hs
R ./compiler/nativeGen/Regs.hs
R ./compiler/nativeGen/RegsBase.hs
A ./compiler/nativeGen/SPARC/CodeGen.hs
A ./compiler/nativeGen/SPARC/Cond.hs
M ./compiler/nativeGen/SPARC/Instr.hs -63 +307
M ./compiler/nativeGen/SPARC/Ppr.hs -15 +120
M ./compiler/nativeGen/SPARC/RegInfo.hs -310 +79
M ./compiler/nativeGen/SPARC/Regs.hs -151 +42
A ./compiler/nativeGen/Size.hs
A ./compiler/nativeGen/TargetReg.hs
A ./compiler/nativeGen/X86/CodeGen.hs
A ./compiler/nativeGen/X86/Cond.hs
M ./compiler/nativeGen/X86/Instr.hs -29 +463
M ./compiler/nativeGen/X86/Ppr.hs -20 +145
M ./compiler/nativeGen/X86/RegInfo.hs -430 +99
M ./compiler/nativeGen/X86/Regs.hs -87 +30
View patch online:
http://darcs.haskell.org/ghc/_darcs/patches/20090215055158-43c66-38c32b72cc7a1fcd81361cc36cdd6801106ef88e.gz
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