Repository : ssh://darcs.haskell.org//srv/darcs/ghc On branch : master
http://hackage.haskell.org/trac/ghc/changeset/2115585f6aa1fc0e4560563fcda2fd1f7a09a5d4 >--------------------------------------------------------------- commit 2115585f6aa1fc0e4560563fcda2fd1f7a09a5d4 Author: Ian Lynagh <[email protected]> Date: Fri Sep 14 19:28:12 2012 +0100 Whitespace only in nativeGen/RegAlloc/Linear/State.hs >--------------------------------------------------------------- compiler/nativeGen/RegAlloc/Linear/State.hs | 87 +++++++++++++-------------- 1 files changed, 41 insertions(+), 46 deletions(-) diff --git a/compiler/nativeGen/RegAlloc/Linear/State.hs b/compiler/nativeGen/RegAlloc/Linear/State.hs index ca2ecd3..57b8991 100644 --- a/compiler/nativeGen/RegAlloc/Linear/State.hs +++ b/compiler/nativeGen/RegAlloc/Linear/State.hs @@ -1,39 +1,33 @@ -- | State monad for the linear register allocator. --- Here we keep all the state that the register allocator keeps track --- of as it walks the instructions in a basic block. +-- Here we keep all the state that the register allocator keeps track +-- of as it walks the instructions in a basic block. {-# OPTIONS_GHC -fno-warn-orphans #-} -{-# OPTIONS -fno-warn-tabs #-} --- The above warning supression flag is a temporary kludge. --- While working on this module you are encouraged to remove it and --- detab the module (please do the detabbing in a separate patch). See --- http://hackage.haskell.org/trac/ghc/wiki/Commentary/CodingStyle#TabsvsSpaces --- for details module RegAlloc.Linear.State ( - RA_State(..), - RegM, - runR, + RA_State(..), + RegM, + runR, - spillR, - loadR, + spillR, + loadR, - getFreeRegsR, - setFreeRegsR, + getFreeRegsR, + setFreeRegsR, - getAssigR, - setAssigR, + getAssigR, + setAssigR, - getBlockAssigR, - setBlockAssigR, + getBlockAssigR, + setBlockAssigR, - setDeltaR, - getDeltaR, + setDeltaR, + getDeltaR, - getUniqueR, + getUniqueR, - recordSpill + recordSpill ) where @@ -56,38 +50,38 @@ instance Monad (RegM freeRegs) where -- | Run a computation in the RegM register allocator monad. -runR :: BlockAssignment freeRegs - -> freeRegs - -> RegMap Loc - -> StackMap - -> UniqSupply - -> RegM freeRegs a - -> (BlockAssignment freeRegs, StackMap, RegAllocStats, a) +runR :: BlockAssignment freeRegs + -> freeRegs + -> RegMap Loc + -> StackMap + -> UniqSupply + -> RegM freeRegs a + -> (BlockAssignment freeRegs, StackMap, RegAllocStats, a) runR block_assig freeregs assig stack us thing = case unReg thing - (RA_State - { ra_blockassig = block_assig - , ra_freeregs = freeregs - , ra_assig = assig - , ra_delta = 0{-???-} - , ra_stack = stack - , ra_us = us - , ra_spills = [] }) + (RA_State + { ra_blockassig = block_assig + , ra_freeregs = freeregs + , ra_assig = assig + , ra_delta = 0{-???-} + , ra_stack = stack + , ra_us = us + , ra_spills = [] }) of - (# state'@RA_State - { ra_blockassig = block_assig - , ra_stack = stack' } - , returned_thing #) + (# state'@RA_State + { ra_blockassig = block_assig + , ra_stack = stack' } + , returned_thing #) - -> (block_assig, stack', makeRAStats state', returned_thing) + -> (block_assig, stack', makeRAStats state', returned_thing) -- | Make register allocator stats from its final state. makeRAStats :: RA_State freeRegs -> RegAllocStats makeRAStats state - = RegAllocStats - { ra_spillInstrs = binSpillReasons (ra_spills state) } + = RegAllocStats + { ra_spillInstrs = binSpillReasons (ra_spills state) } spillR :: Instruction instr @@ -146,4 +140,5 @@ getUniqueR = RegM $ \s -> -- | Record that a spill instruction was inserted, for profiling. recordSpill :: SpillReason -> RegM freeRegs () recordSpill spill - = RegM $ \s -> (# s { ra_spills = spill : ra_spills s}, () #) + = RegM $ \s -> (# s { ra_spills = spill : ra_spills s}, () #) + _______________________________________________ Cvs-ghc mailing list [email protected] http://www.haskell.org/mailman/listinfo/cvs-ghc
