Kindly reply me on nag...@ziplogic.com only
Hi
Let me know if you have any consultants with the following skills
Job : ASIC Physical Design Engineer: Encounter and Prime Time
STA
Location : Dallas, TX
Duration : Long Term
Title: ASIC Physical Design Engineer: Encounter and Prime Time STA
Responsibilities include:
a.. Execute physical design and timing closure of complex SoC, ASIC, and
custom VLSI devices
b.. Address technology issues, signal integrity, electrical analysis, power
analysis, and circuits, etc.
c.. Physical design tasks:
a.. Physical synthesis
b.. Floor planning
c.. Test insertion
d.. Clock tree synthesis
e.. Place and route
f.. Parasitic extraction
g.. Static timing analysis
h.. GV / SV
i.. Crosstalk
j.. Power analysis
k.. Post-layout timing closure
l.. Custom cell development
d.. May be called upon to perform block level design tasks
e.. Generate accurate timing constraints for complex SOC designs that have a
large number of clocks and multiple operational modes
Required Skills:
a.. 3-4 years of ASIC Physical Design implementation and execution
b.. ASIC Physical Design using Encounter
c.. Static timing closure experience (STA) using:
a.. Prime Time
b.. Cadence Encounter
c.. Synopsys Design Compiler
d.. Magma Blast Plan
e.. Magma Blast Fusion
f.. Synopsys Prime Time
d.. Software skills:
a.. Write / debug PERL
b.. Scheme and TCL scripts
e.. HDL and digital design techniques is essential
f.. Experience with UNIX operating system is required
Thanks & Regards,
Nagesh,
Zip Logic LLC.
Ph: 510-250-7617, 510-250-7616
FAX: 510-578-1309
Email: nag...@ziplogic.com,
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