Interrupts are enabled at the point where
the DAVINCI_I2C_IVR_REG is read, so unless
an interrupt happened just at that moment,
no interrupt would be pending. Even though
documentation implies you should do this,
I see no reason. If slave support is added,
this read would cause a hard to reproduce bug.
Signed-off-by: Troy Kisky <[EMAIL PROTECTED]>
---
drivers/i2c/busses/i2c-davinci.c | 6 ------
1 files changed, 0 insertions(+), 6 deletions(-)
mode change 100644 => 100755 drivers/i2c/busses/i2c-davinci.c
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
old mode 100644
new mode 100755
index 6e9fb77..30e8ba8
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -245,7 +245,6 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct
i2c_msg *msg, int stop)
struct davinci_i2c_dev *dev = i2c_get_adapdata(adap);
struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
u32 flag;
- u32 stat;
u16 w;
int r;
#ifdef DAVINCI_HACK
@@ -284,11 +283,6 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct
i2c_msg *msg, int stop)
init_completion(&dev->cmd_complete);
dev->cmd_err = 0;
- /* Clear any pending interrupts by reading the IVR */
- do {
- stat = davinci_i2c_read_reg(dev, DAVINCI_I2C_IVR_REG);
- } while (stat);
-
/* Take I2C out of reset, configure it as master and set the
* start bit */
flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST | DAVINCI_I2C_MDR_STT;
--
1.5.4
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