There are chances that a driver may check if other peripherals
with shared pins are enabled. This patch adds a function for
returning the status of a given pinmux bit.
Signed-off-by: Ramax Lo <[EMAIL PROTECTED]>
---
arch/arm/mach-davinci/mux.c | 17 +++++++++++++++++
include/asm-arm/arch-davinci/mux.h | 1 +
2 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c
index af1ed1c..4668c90 100644
--- a/arch/arm/mach-davinci/mux.c
+++ b/arch/arm/mach-davinci/mux.c
@@ -37,3 +37,20 @@ void davinci_mux_peripheral(unsigned int mux, unsigned int
enable)
spin_unlock(&mux_lock);
}
EXPORT_SYMBOL(davinci_mux_peripheral);
+
+int davinci_mux_status(unsigned int mux)
+{
+ u32 pinmux, muxreg = PINMUX0;
+
+ if (mux >= DAVINCI_MUX_LEVEL2) {
+ muxreg = PINMUX1;
+ mux -= DAVINCI_MUX_LEVEL2;
+ }
+
+ spin_lock(&mux_lock);
+ pinmux = davinci_readl(DAVINCI_SYSTEM_MODULE_BASE + muxreg);
+ spin_unlock(&mux_lock);
+
+ return (pinmux & (1 << mux));
+}
+EXPORT_SYMBOL(davinci_mux_status);
diff --git a/include/asm-arm/arch-davinci/mux.h
b/include/asm-arm/arch-davinci/mux.h
index 9e7cf69..951900a 100644
--- a/include/asm-arm/arch-davinci/mux.h
+++ b/include/asm-arm/arch-davinci/mux.h
@@ -56,5 +56,6 @@
#define DAVINCI_MUX_TIMIN (DAVINCI_MUX_LEVEL2 + 18)
extern void davinci_mux_peripheral(unsigned int mux, unsigned int enable);
+extern int davinci_mux_status(unsigned int mux);
#endif /* __ASM_ARCH_MUX_H */
--
1.5.2.5
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