Hi,
On Wed, Dec 10, 2008 at 12:52:14PM -0600, Narnakaje, Snehaprabha wrote:
> > +static struct resource davinci_nand_resources[] = {
> > + {
> > + .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
> > + .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
> > + .flags = IORESOURCE_MEM,
> > + }, {
> > + .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
> > + .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
> > + .flags = IORESOURCE_MEM,
> > + },
> > +};
>
> The NAND device that comes with the DM355 EVM requires another resource here
> for the second NAND chip select, to be able to use the 2GB space. Has this
> configuration been tested on the EVM?
As I understood from the documentation you use either one or the other.
They even have different width. CE0 uses 8bit and CE1 uses 16bit. If
it's really needed to pass both, an update patch is welcome.
--
balbi
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