Hello Jon,

You wrote:
> If anyone has been here before and has any clues, they would be welcome.
> So far in production we've seen about 2% NAND chips with bad blocks
> where we want to put kernel images, so it looks like I might be learning
> a lot more about U-Boot than I care to.

I have patches against the u-boot git that I will post here
that allow booting (via nboot) with bad blocks.

I didn't submit to upstream u-boot because apparently I based my
patch off of the wrong branch and it just wasn't worth my time
to redo my whole 3-4 lines of code change on a new branch.

We are also using the newer TI flashing utilities and I have patches
against those that allow burning redundant copies of u-boot into
the first 416K of nand flash.

The new UBL (with my patches) will skip bad blocks on write
and on load up... if a block goes bad in the field,
then the CRC check will fail and go the next copy.

Stay tuned for the patches, although we use Lotus notes here
and it has a real nasty habit of mangling patches, so I may have to
do an attachment if it comes out bad... it's not really that many line
changes for the u-boot and you could just fix the source yourself from
the code I'll post.

Regards,
David

--
DAVID A. KONDRAD
Software Design Engineer
On-Q/Legrand
Telephone (800) 321-2343 x311
www.onqlegrand.com


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