Hello. David Brownell wrote:
@@ -165,9 +165,19 @@ static void nuke(struct musb_ep *ep, con if (is_dma_capable() && ep->dma) { struct dma_controller *c = ep->musb->dma_controller; int value; + if (ep->is_in) { + u16 txcsr = musb_readw(epio, MUSB_TXCSR);
this looks unnecessary, in the end you just wanna keep FLUSHFIFO set so...
Besides, FIFO flsuhing doesn;t look sane too. The programming guide has that you need to set TxPktRdy along with FlushFIFO (otherwise the effect of the latter is unspecifiedm IIRC).
+ + /* + * The programming guide says that we must not clear + * the DMAReqMode bit before DMAReqEnab, so we only + * clear it in the second write... + */ + txcsr &= MUSB_TXCSR_DMAMODE; + musb_writew(epio, MUSB_TXCSR, - 0 | MUSB_TXCSR_FLUSHFIFO); + txcsr | MUSB_TXCSR_FLUSHFIFO);
musb_writew(epio, MUSB_TXCSR, 0 | MUSB_TXCSR_DMAMODE | MUSB_TXCSR_FLUSHFIFO); musb_writew(epio, MUSB_TXCSR, 0 | MUSB_TXCSR_FLUSHFIFO);
should do it.
Will we be seeing an updated patch?
Perhaps... our office has been moved, and I wasn't able to send mail before. WBR, Sergei _______________________________________________ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
