Changed the 'if' condition for pinmux register offset to 'mask' value to be able
to set PINMUX0. This would have been skipped otherwise since PINMUX0 is at
offset '0'.

Signed-off-by: Hemant Pedanekar <[email protected]>
---
 arch/arm/mach-davinci/mux.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c
index 9e3e31b..bbba0b2 100644
--- a/arch/arm/mach-davinci/mux.c
+++ b/arch/arm/mach-davinci/mux.c
@@ -63,8 +63,8 @@ int __init_or_module davinci_cfg_reg(const unsigned long 
index)
                return -ENODEV;
        }
 
-       /* Check the mux register in question */
-       if (cfg->mux_reg) {
+       /* Update the mux register in question */
+       if (cfg->mask) {
                unsigned        tmp1, tmp2;
 
                spin_lock_irqsave(&mux_spin_lock, flags);
-- 
1.6.0.3

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