Hi,
Thanks for the answer. We have already adapted the MAR settings, this
wasn't the problem.
For example, consider this block from the file CFG_OMAP3530_SHMEM.c:
{
7, /* ENTRY
"DSPL1PRAM", /* NAME
0x5cE00000, /* ADDRPHYS
0x10E00000, /* ADDRDSPVIRT
(Uint32) -1, /* ADDRGPPVIRT
0x00008000, /* SIZE
TRUE, /* SHARED
FALSE /* SYNCD
},
Which document tells me, that L1P RAM starts at 0x5cE00000 or
0x10E00000 respectively?
Regards,
Ingo
Quoting "Kamoolkar, Mugdha" <mug...@ti.com>:
Hi,
Please see here:
http://wiki.davincidsp.com/index.php?title=Changing_DSPLink_Memory_Map
At the bottom of the page, we mention that SPRU871.pdf
(http://focus.ti.com/general/docs/techdocsabstract.tsp?abstractName=spru871)
has the required MAR address ranges.
Regards,
Mugdha
-----Original Message-----
From:
davinci-linux-open-source-bounces+mugdha=ti....@linux.davincidsp.com
[mailto:davinci-linux-open-source-bounces+mugdha=ti....@linux.davincidsp.com] On Behalf Of Ingo
Jenni
Sent: Tuesday, May 26, 2009 3:09 AM
To: davinci-linux-open-source@linux.davincidsp.com
Subject: Exact DSP on the OMAP3530
Hello all,
We are developing applications to be run on the Beagleboard and Gumstix
Overo equipped with a OMAP3530 system-on-chip. The datasheet of the
latter tells us, that it has a TMS320C64x+ DSP on chip. So far so good.
Problems arised however as we wanted to get deeper into the matters and
change the dsplink standard configuration for cache usage. Trying to
find memory base addresses, both the TMS320C64x+ Megamodule Guide as
well as the Cache User Guide refer to the datasheet of the specific device.
Also the Chip Support Library asks for the exact model in order to know
register addresses and things. Now, what is this specific device? The
C6421, C6424, or some custom omap3530 c64x+ processor? We couldn't find
the answer in the OMAP3530 datasheet nor on the davinci wiki...
Any help would be greatly appreciated!
Best regards
Ingo Jenni
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