nar...@ti.com writes: > From: Naresh Medisetty <nar...@ti.com> > > Enables module clock for DM646x EDMA channel controller and transfer > controller. > > Channel mapping logic is introduced in dm646x EDMA. This implies that there > is > no fixed association for a channel number to a parameter entry number. In > other > words, using the DMA channel mapping registers (DCHMAPn), a PaRAM entry can be > mapped to any channel. While in the case of dm644x and dm355 there is a fixed > mapping between the EDMA channel and Param entry number. > > Signed-off-by: Naresh Medisetty <nar...@ti.com> > --- > Dave, I have not fixed your comments regarding > 1) naming the event queues wrt priority. > 2) Implementing single tc err handler for all the Transfer controllers > 3) Getting the TC err interrupt numbers from platform resources. > 4) Getting rid of the n_* fields in struct edma_soc_info with the help of > EDMA_CCCFG register > > The aim of this patch is to get the DM646x EDMA support going. Subsequent > patches should address other concerns you have raised. >
Naresh, Can you update the davinci git kernel wiki[1] with an EDMA section that lists these todo items? Thanks, Kevin [1] http://wiki.davincidsp.com/index.php?title=DaVinci_GIT_Linux_Kernel _______________________________________________ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
