Hello.
Sekhar Nori wrote:
add basic cpufreq support for DA850/OMAP-L138
Currently, frequency scaling only on PLL0 is supported. No scaling of PLL1
or voltage levels as yet.
This patch also moves Async3 clock source to PLL1 so that frequency scaling
on PLL0 does not affect those peripherals. Without this the console on UART2
goes for a toss the moment CPUFreq kicks in.
The OPP defintions assume clock input of 24MHz to the SoC. This is inline
with hardcoding of input frequency in the <soc>.c files. At some point
this will need to move into board dependent code as boards appear with
different input clock.
Tested with ondemand governer and a shell script to vary processor load.
Signed-off-by: Sekhar Nori <nsek...@ti.com>
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 274f004..7a3a376 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -15,6 +15,7 @@
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
+#include <linux/cpufreq.h>
#include <asm/mach/map.h>
@@ -32,14 +33,20 @@
#define DA850_PSC0_BASE 0x01c10000
#define DA850_PLL0_BASE 0x01c11000
-#define DA850_JTAG_ID_REG 0x01c14018
#define DA850_TIMER64P0_BASE 0x01c20000
#define DA850_TIMER64P1_BASE 0x01c21000
#define DA850_GPIO_BASE 0x01e26000
#define DA850_PSC1_BASE 0x01e27000
#define DA850_PLL1_BASE 0x01e1a000
Please don't duplicate these #define's which are not specific to DA850
and are the same for DA830. Could you move them into soime header file
instead -- probably <mach/hardware.h>?
+#define DA850_SYSCFG_BASE 0x01c14000
+#define DA850_CFGCHIP0_REG (DA850_SYSCFG_BASE + 0x17c)
+#define DA850_CFGCHIP3_REG (DA850_SYSCFG_BASE + 0x188)
+#define DA850_JTAG_ID_REG (DA850_SYSCFG_BASE + 0x18)
These registers are the same b/w DA830 and DA850. Place them into some
header file instead.
Note that I'll also need CHIPCFG2 #define for the USB platfrom code.
WBR, Sergei
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