From: Davide Bonfanti <davide.bonfa...@bticino.it>
Date: Fri, 4 Jun 2010 13:56:35 +0200
Subject: [PATCH 05/12] mtd-nand: davinci: Added 16 bit wide bus for DaVinci
bmx board
Signed-off-by: "Raffaele Recalcati <raffaele.recalc...@bticino.it>"
---
drivers/mtd/nand/davinci_nand.c | 40
+++++++++++++++++++++++++++++++++++++++
1 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/nand/davinci_nand.c
b/drivers/mtd/nand/davinci_nand.c
index 103235e..d29685d 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -508,6 +508,38 @@ static void __init nand_dm6446evm_flash_init(struct
davinci_nand_info *info)
}
}
+static void __init nand_bmx_flash_init(struct davinci_nand_info *info)
+{
+ uint32_t regval, a1cr;
+
+ /*
+ * NAND FLASH timings @ PLL1 == 459 MHz
+ * - AEMIF.CLK freq = PLL1/6 = 459/6 = 76.5 MHz
+ * - AEMIF.CLK period = 1/76.5 MHz = 13.1 ns
+ */
+ regval = 0
+ | (0 << 31) /* selectStrobe */
+ | (1 << 30) /* extWait (never with NAND) */
+ | (0 << 26) /* writeSetup 10 ns */
+ | (4 << 20) /* writeStrobe 40 ns */
+ | (0 << 17) /* writeHold 10 ns */
+ | (0 << 13) /* readSetup 10 ns */
+ | (4 << 7) /* readStrobe 60 ns */
+ | (0 << 4) /* readHold 10 ns */
+ | (1 << 2) /* turnAround ?? ns */
+ | (1 << 0) /* asyncSize 16-bit bus */
+ ;
+ a1cr = davinci_nand_readl(info, A1CR_OFFSET);
+ if (a1cr != regval) {
+ dev_err(info->dev, "Warning: NAND config: Set A1CR " \
+ "reg to 0x%08x, was 0x%08x, should be done by " \
+ "bootloader.\n", regval, a1cr);
+ davinci_nand_writel(info, A1CR_OFFSET, regval);
+ }
+
+}
+
+
/*----------------------------------------------------------------------*/
/* An ECC layout for using 4-bit ECC with small-page flash, storing
@@ -697,6 +729,14 @@ static int __init nand_davinci_probe(struct
platform_device *pdev)
*/
if (machine_is_davinci_evm())
nand_dm6446evm_flash_init(info);
+ else if (machine_is_bmx())
+ nand_bmx_flash_init(info); /* no reason to do this,
+ * because the boot loader
+ * is booting the kernel
+ * that is in the nand flash
+ * and so EMIF must already
+ * configured
+ */
spin_lock_irq(&davinci_nand_lock);
--
1.6.3.3
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