Sorry, please integrate the previous e-mail with this one...
(I made a mistake sending the e-mail)
>> > -Solving a possible race when writing PERI_CLKCTL, see Nori Sekhar
>> explanation:
>> > "Looks like the same register supports setting clocks for voice codec
>> > and keyscan module as well. This can cause a race if those clocks are
>> > modified in a different context. Can you extend this function to cover
>> > those clocks as well? May be clk->lpsc can be used to determine if div1,
>> > div2 or div3 need to be changed. This way you can serialize the setting
>> > up of these clocks."
>>
>> I agree with Sekhar. This needs to be addresed before this patch is
>> mergable.
>>
>
> It is more difficult.
> Something like the following?
>
int dm365_peri_clkctl_set_rate(struct clk *clk, unsigned long rate)
{
int i;
unsigned long input;
unsigned ratio;
unsigned regval;
void __iomem *system_module_base;
/* There must be a parent... */
if (WARN_ON(!clk->parent))
return -EINVAL;
input = clk->parent->rate;
if (input > rate)
ratio = DIV_ROUND_UP(input, rate) - 1;
system_module_base = ioremap(DAVINCI_SYSTEM_MODULE_BASE, SZ_4K);
regval = __raw_readl(system_module_base + PERI_CLKCTL);
switch (clk->lpsc) {
case DM365_LPSC_CLKOUT2:
regval &= ~DIV1_MASK;
regval |= ratio << 3;
break;
case DM365_LPSC_VOICE_CODEC:
regval &= ~DIV2_MASK;
regval |= ratio << 7;
break;
case DM365_LPSC_KEYSCAN:
regval &= ~DIV3_MASK;
regval |= ratio << 16;
break;
/* to make changes work stop CLOCKOUT & start it again */
regval |= BIT(CLOCKOUT2EN);
mutex_lock(&peri_clkctl_mutex);
__raw_writel(regval, system_module_base + PERI_CLKCTL);
regval &= ~(1 << CLOCKOUT2EN);
__raw_writel(regval, system_module_base + PERI_CLKCTL);
mutex_unlock(&peri_clkctl_mutex);
iounmap(system_module_base);
return 0;
}
Obviously a similar modification to the following recalc function will be
needed.
Regards,
Raffaele
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