Hi Philby,
On Wed, Jan 27, 2010 at 1:41 AM, Kevin Hilman
<khil...@deeprootsystems.com>wrote:
> From: Philby John <pj...@in.mvista.com>
>
> Come out of i2c time out condition by following the
> bus recovery procedure outlined in the i2c protocol v3 spec.
> The kernel must be robust enough to gracefully recover
> from i2c bus failure without having to reset the machine.
> This is done by first NACKing the slave, pulsing the SCL
> line 9 times and then sending the stop command.
>
> This patch has been tested on a DM6446 and DM355
>
> Signed-off-by: Philby John <pj...@in.mvista.com>
> Signed-off-by: Srinivasan, Nageswari <nagesw...@ti.com>
> Acked-by: Kevin Hilman <khil...@deeprootsystems.com>
> ---
> drivers/i2c/busses/i2c-davinci.c | 57
> +++++++++++++++++++++++++++++++++++--
> 1 files changed, 53 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-davinci.c
> b/drivers/i2c/busses/i2c-davinci.c
> index 35f9daa..5459065 100644
> --- a/drivers/i2c/busses/i2c-davinci.c
> +++ b/drivers/i2c/busses/i2c-davinci.c
> @@ -36,6 +36,7 @@
> #include <linux/platform_device.h>
> #include <linux/io.h>
> #include <linux/cpufreq.h>
> +#include <linux/gpio.h>
>
> #include <mach/hardware.h>
> #include <mach/i2c.h>
> @@ -43,6 +44,7 @@
> /* ----- global defines ----------------------------------------------- */
>
> #define DAVINCI_I2C_TIMEOUT (1*HZ)
> +#define DAVINCI_I2C_MAX_TRIES 2
> #define I2C_DAVINCI_INTR_ALL (DAVINCI_I2C_IMR_AAS | \
> DAVINCI_I2C_IMR_SCD | \
> DAVINCI_I2C_IMR_ARDY | \
> @@ -130,6 +132,44 @@ static inline u16 davinci_i2c_read_reg(struct
> davinci_i2c_dev *i2c_dev, int reg)
> return __raw_readw(i2c_dev->base + reg);
> }
>
> +/* Generate a pulse on the i2c clock pin. */
> +static void generic_i2c_clock_pulse(unsigned int scl_pin)
> +{
> + u16 i;
> +
> + if (scl_pin) {
> + /* Send high and low on the SCL line */
> + for (i = 0; i < 9; i++) {
> + gpio_set_value(scl_pin, 0);
> + udelay(20);
> + gpio_set_value(scl_pin, 1);
> + udelay(20);
> + }
> + }
> +}
> +
> +/* This routine does i2c bus recovery as specified in the
> + * i2c protocol Rev. 03 section 3.16 titled "Bus clear"
> + */
> +static void i2c_recover_bus(struct davinci_i2c_dev *dev)
> +{
> + u32 flag = 0;
> + struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
> +
> + dev_err(dev->dev, "initiating i2c bus recovery\n");
> + /* Send NACK to the slave */
> + flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
> + flag |= DAVINCI_I2C_MDR_NACK;
> + /* write the data into mode register */
> + davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
> + if (pdata)
> + generic_i2c_clock_pulse(pdata->scl_pin);
> + /* Send STOP */
> + flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
> + flag |= DAVINCI_I2C_MDR_STP;
> + davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
> +}
> +
> static inline void davinci_i2c_reset_ctrl(struct davinci_i2c_dev *i2c_dev,
> int val)
> {
> @@ -235,14 +275,22 @@ static int i2c_davinci_wait_bus_not_busy(struct
> davinci_i2c_dev *dev,
> char allow_sleep)
> {
> unsigned long timeout;
> + static u16 to_cnt;
>
> timeout = jiffies + dev->adapter.timeout;
> while (davinci_i2c_read_reg(dev, DAVINCI_I2C_STR_REG)
> & DAVINCI_I2C_STR_BB) {
> - if (time_after(jiffies, timeout)) {
> - dev_warn(dev->dev,
> - "timeout waiting for bus ready\n");
> - return -ETIMEDOUT;
> + if (to_cnt <= DAVINCI_I2C_MAX_TRIES) {
> + if (time_after(jiffies, timeout)) {
> + dev_warn(dev->dev,
> + "timeout waiting for bus ready\n");
> + to_cnt++;
> + return -ETIMEDOUT;
> + } else {
> + to_cnt = 0;
> + i2c_recover_bus(dev);
> + i2c_davinci_init(dev);
> + }
> }
> if (allow_sleep)
> schedule_timeout(1);
>
The resulting loop has the following drawbacks:
1) If to_cnt reaches DAVINCI_I2C_MAX_TRIES+1 (which it currently can't, see
2) and the i2c bus collapses,
the kernel will be stuck in the loop forever, especially if allow_sleep
is false.
2) The to_cnt static var never increments beyond 1. It's initialized to zero
and then kept at zero until the timeout expires.
When the timeout expires, to_cnt is incremented once, until the next
call to the function, where it will be zeroed again.
3) Do we really want to retry recovering the bus thousands of times, until
the timeout arrives?
It seems to me that if the bus recovery procedure didn't help after one
or two tries, it probably never will.
I also have the following nitpicks:
a) The timeout variable actually holds the finish time.
b) The i2c_recover_bus function uses dev_err to report a bus recovery
process,
but if all recovery attempts failed and the timeout was reached, only
dev_warn is used to report the timeout.
Other than that the patch is very helpful, thanks a lot.
Below is my suggestion for the wait_bus_not_busy function. My patch has been
tested on a DM6446.
Signed-off-by: Pablo Bitton <pablo.bit...@gmail.com>
--
diff --git a/drivers/i2c/busses/i2c-davinci.c
b/drivers/i2c/busses/i2c-davinci.c
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -220,16 +261,24 @@ static int i2c_davinci_init(struct davinci_i2c_dev
*dev)
static int i2c_davinci_wait_bus_not_busy(struct davinci_i2c_dev *dev,
char allow_sleep)
{
- unsigned long timeout;
+ unsigned long finish_time;
+ unsigned long to_cnt = 0;
- timeout = jiffies + dev->adapter.timeout;
+ finish_time = jiffies + dev->adapter.timeout;
+ /* While bus busy */
while (davinci_i2c_read_reg(dev, DAVINCI_I2C_STR_REG)
& DAVINCI_I2C_STR_BB) {
- if (time_after(jiffies, timeout)) {
+ if (time_after(jiffies, finish_time)) {
dev_warn(dev->dev,
"timeout waiting for bus ready\n");
return -ETIMEDOUT;
}
+ else if (to_cnt <= DAVINCI_I2C_MAX_TRIES) {
+ dev_warn(dev->dev, "bus busy, performing bus recovery\n");
+ ++to_cnt;
+ i2c_recover_bus(dev);
+ i2c_davinci_init(dev);
+ }
if (allow_sleep)
schedule_timeout(1);
}
_______________________________________________
Davinci-linux-open-source mailing list
Davinci-linux-open-source@linux.davincidsp.com
http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
