Hi Sekhar, On Tuesday, July 5, 2011, Nori, Sekhar <nsek...@ti.com> wrote: > Hi Christian, > > On Tue, Jul 05, 2011 at 16:45:52, Christian Riesch wrote: >> Hi, >> >> According to the register description of the MDSTATn registers of the >> AM1808 SoC the module state with regard to the power and sleep controller >> (PSC) is given in bits 5-0. Hence, the bitmask that is used to read the >> module state should be 0x3f. However, the MDSTAT_STATE_MASK defined in >> arch/arm/mach-davinci/include/mach/psc.h is set to 0x1f. >> >> This was already reported by Sergei Shtylyov [1] but apparently it has >> not been changed. Is there any special reason why this was not corrected? > > I don't think there is any special reason. As Kevin said in the thread, > the fix should have been a separate patch - which probably never came.
Ok. > Curious as to why this came up? Did you hit any issue? No, I didn't, I came across it when debugging a PSC related issue in u-boot [1], which uses the same bitmask. However, the bitmask was not the reason for my problems, 0x1f worked fine. But of course it took me some time to figure that out so I guess it should be corrected to prevent others from having to think about it. Thanks, Christian [1] http://marc.info/?l=u-boot&m=130857573323691&w=2 _______________________________________________ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
