Paul, Lets continue this discussion on e2e forum as I see lot of questions on forum . http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/100/p/123233/439517.aspx#439517
Regards, Nag ________________________________________ From: Paul Stuart [[email protected]] Sent: Tuesday, July 19, 2011 8:12 PM To: Netagunte, Nagabhushana; [email protected] Subject: RE: DM365: How to disable deinterlacing in Chained Resizer mode Nag, Thanks for getting in touch with me, really appreciate it. I'm missing the big picture here. What, in broad strokes, do I need to change about the ISR routine to make this work? Just need the general concept, 'cause I'm missing it. My understanding is that the two fields are stored interleaved in memory. Where is the magic, in chained mode, that makes the resizer skip every other line? In previous experiments, I modified SDOFST to not skip lines, but it still looked like "normal" video. Does this register change behavior in chained mode, or only in one shot when we pull from SDRAM? Thanks! Paul -----Original Message----- From: Netagunte, Nagabhushana [mailto:[email protected]] Sent: Tuesday, July 19, 2011 7:03 AM To: Paul Stuart; [email protected] Subject: RE: DM365: How to disable deinterlacing in Chained Resizer mode Paul, If you wan to capture D1 interlaced video from VPFE, why you wan to connect previewer and reszier in chained mode with CCDC? Simple way will be to capture from CCDC. You need to change ISR routines though. For example, If you are using arago source(http://arago-project.org/git/projects/?p=linux-davinci.git;a=shortlog;h=refs/heads/r37), you can change vpfe_isr() and vpfe_vdint1_isr() to capture interlaced video frames. In addition to above changes, you need to change programming of CCDC's SDOFST register in CCDC driver module [ Refer to section 6.1.15 of VPFE user guide]. Regards, Nag ________________________________________ From: [email protected] [[email protected]] On Behalf Of Paul Stuart [[email protected]] Sent: Friday, July 15, 2011 4:29 AM To: [email protected] Subject: DM365: How to disable deinterlacing in Chained Resizer mode Hello, Bashing my head against the wall trying to get the VPFE drivers to send up both fields of D1 interlaced video so I can use the DEI algorithm for deinterlacing instead of the poor-man's method of just throwing a field away. Anyone have any clues as how to modify the driver to make this happen in chained mode? I was hoping that just preserving the vertical resolution in ipipe_set_input_win (and ipipe_get_input_win) would work, but that just makes my system hang. There have been allusions in other threads about the need to modify some ISR's to make this work. Anyone trod down this path? Thanks, Paul _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
