The patch is mindless, it just moves the idle function below in the file
in order to prevent forward declaration in the next patch.

Signed-off-by: Daniel Lezcano <daniel.lezc...@linaro.org>
---
 arch/arm/mach-davinci/cpuidle.c |   72 +++++++++++++++++++--------------------
 1 file changed, 36 insertions(+), 36 deletions(-)

diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c
index ebb8808..9438672 100644
--- a/arch/arm/mach-davinci/cpuidle.c
+++ b/arch/arm/mach-davinci/cpuidle.c
@@ -31,42 +31,6 @@ struct davinci_ops {
        u32 flags;
 };
 
-/* Actual code that puts the SoC in different idle states */
-static int davinci_enter_idle(struct cpuidle_device *dev,
-                               struct cpuidle_driver *drv,
-                                               int index)
-{
-       struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
-       struct davinci_ops *ops = cpuidle_get_statedata(state_usage);
-
-       if (ops && ops->enter)
-               ops->enter();
-
-       index = cpuidle_wrap_enter(dev, drv, index,
-                               arm_cpuidle_simple_enter);
-
-       if (ops && ops->exit)
-               ops->exit();
-
-       return index;
-}
-
-static struct cpuidle_driver davinci_idle_driver = {
-       .name                   = "cpuidle-davinci",
-       .owner                  = THIS_MODULE,
-       .en_core_tk_irqen       = 1,
-       .states[0]              = ARM_CPUIDLE_WFI_STATE,
-       .states[1]              = {
-               .enter                  = davinci_enter_idle,
-               .exit_latency           = 10,
-               .target_residency       = 100000,
-               .flags                  = CPUIDLE_FLAG_TIME_VALID,
-               .name                   = "DDR SR",
-               .desc                   = "WFI and DDR Self Refresh",
-       },
-       .state_count = DAVINCI_CPUIDLE_MAX_STATES,
-};
-
 static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
 static void __iomem *ddr2_reg_base;
 static bool ddr2_pdown = false;
@@ -107,6 +71,42 @@ static struct davinci_ops 
davinci_states[DAVINCI_CPUIDLE_MAX_STATES] = {
        },
 };
 
+/* Actual code that puts the SoC in different idle states */
+static int davinci_enter_idle(struct cpuidle_device *dev,
+                               struct cpuidle_driver *drv,
+                                               int index)
+{
+       struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
+       struct davinci_ops *ops = cpuidle_get_statedata(state_usage);
+
+       if (ops && ops->enter)
+               ops->enter();
+
+       index = cpuidle_wrap_enter(dev, drv, index,
+                               arm_cpuidle_simple_enter);
+
+       if (ops && ops->exit)
+               ops->exit();
+
+       return index;
+}
+
+static struct cpuidle_driver davinci_idle_driver = {
+       .name                   = "cpuidle-davinci",
+       .owner                  = THIS_MODULE,
+       .en_core_tk_irqen       = 1,
+       .states[0]              = ARM_CPUIDLE_WFI_STATE,
+       .states[1]              = {
+               .enter                  = davinci_enter_idle,
+               .exit_latency           = 10,
+               .target_residency       = 100000,
+               .flags                  = CPUIDLE_FLAG_TIME_VALID,
+               .name                   = "DDR SR",
+               .desc                   = "WFI and DDR Self Refresh",
+       },
+       .state_count = DAVINCI_CPUIDLE_MAX_STATES,
+};
+
 static int __init davinci_cpuidle_probe(struct platform_device *pdev)
 {
        int ret;
-- 
1.7.9.5

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