--- Begin Message ---
Source: binutils
Version: 2.28-5
Severity: normal
File: /usr/bin/arm-linux-gnueabihf-objdump
Tags: upstream fixed-upstream patch
Dear Maintainer,
$ arm-linux-gnueabihf-as << EOF
.arch armv7-a
.text
.syntax unified
.thumb
.fpu neon
vmlal.u16 q8, d9, d24
vmlal.u16 q8, d2, d23
vmlal.u16 q8, d3, d22
vmlal.u16 q8, d4, d21
vmlal.u16 q8, d5, d20
vmlal.u16 q8, d30, d19
vmlal.u16 q8, d31, d28
EOF
$ arm-linux-gnueabihf-objdump -d a.out
a.out: file format elf32-littlearm
Disassembly of section .text:
00000000 <.text>:
0: ffd9 0828 vcmla.f32 d16, d9, d24[0], #90
4: ffd2 0827 vcmla.f32 d16, d2, d23[0], #90
8: ffd3 0826 vcmla.f32 d16, d3, d22[0], #90
c: ffd4 0825 vcmla.f32 d16, d4, d21[0], #90
10: ffd5 0824 vcmla.f32 d16, d5, d20[0], #90
14: ffde 08a3 vcmla.f32 d16, d30, d19[0], #90
18: ffdf 08ac vcmla.f32 d16, d31, d28[0], #90
Identical (incorrect) result with binutils-arm-linux-gnueabihf:i386,
binutils-multiarch:i386 and with (on target host) binutils:armhf.
(Given that compiled code behaves correctly, assembler works correctly,
only disassembler/objdump is broken)
Non-.thumb encoding is not affected, with .thumb directive removed
above:
0: f3d90828 vmlal.u16 q8, d9, d24
4: f3d20827 vmlal.u16 q8, d2, d23
...
It looks like fixed upstream by commit
c13a63b04677906020ee72a28d5869d979e36a6f
(at least, it works correctly with binary-patched libopcodes*.so;
totally untested stripped-down version of patch attached);
claim about "currently undefined instruction" in commit description was
a bit too optimistic.
Buster's binutils-2.31 is likely not affected (but I have not verified).
gdb_7.12-6 in stretch seems embeds binutils version that predates vcmla
support, so it is not affected (verified with gdb-multiarch); no idea
about buster.
-- System Information:
Debian Release: 9.7
APT prefers stable-updates
APT policy: (500, 'stable-updates'), (500, 'stable-debug'), (500,
'proposed-updates-debug'), (500, 'proposed-updates'), (500, 'stable')
Architecture: i386 (x86_64)
Foreign Architectures: amd64
Kernel: Linux 4.9.0-6-amd64 (SMP w/2 CPU cores)
Locale: LANG=ru_RU.KOI8-R, LC_CTYPE=ru_RU.KOI8-R (charmap=KOI8-R),
LANGUAGE=ru_RU.KOI8-R (charmap=KOI8-R)
Shell: /bin/sh linked to /bin/dash
Init: systemd (via /run/systemd/system)
Versions of packages binutils-multiarch depends on:
ii binutils 2.28-5
ii libc6 2.24-11+deb9u3
ii zlib1g 1:1.2.8.dfsg-5
binutils-multiarch recommends no packages.
binutils-multiarch suggests no packages.
-- no debconf information
>From c13a63b04677906020ee72a28d5869d979e36a6f Mon Sep 17 00:00:00 2001
From: Szabolcs Nagy <[email protected]>
Date: Wed, 18 Jan 2017 17:08:34 +0000
Subject: [PATCH] [ARM] Fix the decoding of indexed element VCMLA instruction
Bit 24 of the indexed element vcmla decode mask was incorrectly
left unset. This could cause incorrect disassembly of some
currently undefined instructions as vcmla.
Rotatation immediates were not printed correctly in the disassembly
(could print 170 and 280 instead of 180 and 270).
opcodes/
* arm-dis.c (coprocessor_opcodes): Fix vcmla mask and disassembly.
gas/
* testsuite/gas/arm/armv8_3-a-simd.s: Add vcmla tests.
* testsuite/gas/arm/armv8_3-a-simd.d: Update.
---
gas/ChangeLog | 5 +++++
gas/testsuite/gas/arm/armv8_3-a-simd.d | 12 ++++++++++++
gas/testsuite/gas/arm/armv8_3-a-simd.s | 14 ++++++++++++++
opcodes/ChangeLog | 4 ++++
opcodes/arm-dis.c | 8 ++++----
5 files changed, 39 insertions(+), 4 deletions(-)
[removed for backport] diff --git a/gas/ChangeLog b/gas/ChangeLog
[removed for backport] diff --git a/gas/testsuite/gas/arm/armv8_3-a-simd.d
b/gas/testsuite/gas/arm/armv8_3-a-simd.d
[removed for backport] diff --git a/gas/testsuite/gas/arm/armv8_3-a-simd.s
b/gas/testsuite/gas/arm/armv8_3-a-simd.s
[removed for backport] diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 167c6685c..2987403fb 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -897,13 +897,13 @@ static const struct opcode32 coprocessor_opcodes[] =
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_3A),
0xfd300800, 0xff300f10, "vcmla%c.f32\t%12-15,22V, %16-19,7V, %0-3,5V,
#%23?21%23?780"},
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_3A),
- 0xfe000800, 0xfea00f10, "vcmla%c.f16\t%12-15,22V, %16-19,7V, %0-3D[%5?10],
#%20'90"},
+ 0xfe000800, 0xffa00f10, "vcmla%c.f16\t%12-15,22V, %16-19,7V, %0-3D[%5?10],
#%20'90"},
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_3A),
- 0xfe200800, 0xfea00f10, "vcmla%c.f16\t%12-15,22V, %16-19,7V, %0-3D[%5?10],
#%20?21%23?780"},
+ 0xfe200800, 0xffa00f10, "vcmla%c.f16\t%12-15,22V, %16-19,7V, %0-3D[%5?10],
#%20?21%20?780"},
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_3A),
- 0xfe800800, 0xfea00f10, "vcmla%c.f32\t%12-15,22V, %16-19,7V, %0-3,5D[0],
#%20'90"},
+ 0xfe800800, 0xffa00f10, "vcmla%c.f32\t%12-15,22V, %16-19,7V, %0-3,5D[0],
#%20'90"},
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_3A),
- 0xfea00800, 0xfea00f10, "vcmla%c.f32\t%12-15,22V, %16-19,7V, %0-3,5D[0],
#%20?21%23?780"},
+ 0xfea00800, 0xffa00f10, "vcmla%c.f32\t%12-15,22V, %16-19,7V, %0-3,5D[0],
#%20?21%20?780"},
/* V5 coprocessor instructions. */
{ARM_FEATURE_CORE_LOW (ARM_EXT_V5),
--
2.11.0
--- End Message ---
