Package: coreutils
Version: 8.20-3
Severity: normal
Tags: patch
User: [email protected]
Usertags: origin-ubuntu ubuntu-patch raring
After fixing #689611 (config.guess/sub update), coreutils still fails to
build on arm64 as follows:
aarch64-linux-gnu-gcc -std=gnu99 -I. -I./lib -Ilib -I./lib -Isrc
-I./src -D_FORTIFY_SOURCE=2 -g -O2 --param=ssp-buffer-size=4 -Wformat
-Werror=format-security -DSYSLOG_SUCCESS -DSYSLOG_FAILURE -DSYSLOG_NON_ROOT -MT
src/factor.o -MD -MP -MF $depbase.Tpo -c -o src/factor.o src/factor.c &&\
mv -f $depbase.Tpo $depbase.Po
/tmp/ccaz8Jyv.s: Assembler messages:
/tmp/ccaz8Jyv.s:747: Error: operand 3 should be an integer register -- `adc
x11,x2,0'
/tmp/ccaz8Jyv.s:760: Error: operand 3 should be an integer register -- `adc
x2,x11,0'
/tmp/ccaz8Jyv.s:798: Error: operand 3 should be an integer register -- `adc
x4,x11,0'
/tmp/ccaz8Jyv.s:814: Error: operand 3 should be an integer register -- `adc
x8,x10,0'
/tmp/ccaz8Jyv.s:844: Error: operand 3 should be an integer register -- `adc
x3,x8,0'
/tmp/ccaz8Jyv.s:857: Error: operand 3 should be an integer register -- `adc
x1,x3,0'
/tmp/ccaz8Jyv.s:6193: Error: operand 3 should be an integer register -- `adc
x1,x1,0'
/tmp/ccaz8Jyv.s:6299: Error: operand 3 should be an integer register -- `adc
x0,x5,0'
/tmp/ccaz8Jyv.s:6457: Error: operand 3 should be an integer register -- `adc
x5,x5,0'
make[3]: *** [src/factor.o] Error 1
This has been fixed in gmp upstream; cf.
https://bugs.launchpad.net/linaro-aarch64/+bug/1099558. The following
patch fixes it.
* Backport from gmp upstream:
- (aarch64): Make add_ssaaaa and sub_ddmmss actually work.
diff -u coreutils-8.20/debian/patches/00list
coreutils-8.20/debian/patches/00list
--- coreutils-8.20/debian/patches/00list
+++ coreutils-8.20/debian/patches/00list
@@ -7,3 +7,4 @@
99_kill_df_total-unprocessed_test
99_hppa_longlong
99_factor_long_long
+99_arm64_longlong
--- coreutils-8.20.orig/debian/patches/99_arm64_longlong.dpatch
+++ coreutils-8.20/debian/patches/99_arm64_longlong.dpatch
@@ -0,0 +1,43 @@
+#! /bin/sh /usr/share/dpatch/dpatch-run
+## 99_arm64_longlong.dpatch by Colin Watson <[email protected]>
+##
+## All lines beginning with `## DP:' are a description of the patch.
+## DP: (aarch64): Make add_ssaaaa and sub_ddmmss actually work.
+## DP: Author: Torbjorn Granlund <[email protected]>
+## DP: Origin: upstream, http://gmplib.org:8000/gmp/rev/187b7b1646ee
+
+@DPATCH@
+diff -urNad '--exclude=CVS' '--exclude=.svn' '--exclude=.git'
'--exclude=.arch' '--exclude=.hg' '--exclude=_darcs' '--exclude=.bzr'
coreutils-8.20~/src/longlong.h coreutils-8.20/src/longlong.h
+--- coreutils-8.20~/src/longlong.h 2013-01-17 04:05:16.000000000 +0000
++++ coreutils-8.20/src/longlong.h 2013-01-17 04:05:46.000000000 +0000
+@@ -530,23 +530,16 @@
+ #endif /* __arm__ */
+
+ #if defined (__aarch64__) && W_TYPE_SIZE == 64
++/* FIXME: Extend the immediate range for the low word by using both
++ ADDS and SUBS, since they set carry in the same way. */
+ #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+- __asm__ ("adds\t%1, %4, %5\n\tadc\t%0, %2, %3" \
++ __asm__ ("adds\t%1, %x4, %5\n\tadc\t%0, %x2, %x3" \
+ : "=r" (sh), "=&r" (sl) \
+- : "r" (ah), "rZ" (bh), "%r" (al), "rI" (bl) __CLOBBER_CC)
++ : "rZ" (ah), "rZ" (bh), "%r" (al), "rI" (bl) __CLOBBER_CC)
+ #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+- do {
\
+- if (__builtin_constant_p (bl)) \
+- {
\
+- __asm__ ("subs\t%1, %4, %5\n\tsbc\t%0, %2, %3" \
+- : "=r" (sh), "=&r" (sl) \
+- : "r" (ah), "r" (bh), "r" (al), "rI" (bl) __CLOBBER_CC); \
+- }
\
+- else /* only bh might be a constant */ \
+- __asm__ ("subs\t%1, %4, %5\n\tsbc\t%0, %2, %3" \
+- : "=r" (sh), "=&r" (sl) \
+- : "r" (ah), "rZ" (bh), "r" (al), "rI" (bl) __CLOBBER_CC);\
+- } while (0)
++ __asm__ ("subs\t%1, %x4, %5\n\tsbc\t%0, %x2, %x3" \
++ : "=r,r" (sh), "=&r,&r" (sl) \
++ : "rZ,rZ" (ah), "rZ,rZ" (bh), "r,Z" (al), "rI,r" (bl) __CLOBBER_CC)
+ #define umul_ppmm(ph, pl, m0, m1) \
+ do {
\
+ UDItype __m0 = (m0), __m1 = (m1); \
Thanks,
--
Colin Watson [[email protected]]
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