Yes. Aside from being misaligned, any address in page 0 will fault.
On 2022-01-06 3:34 p.m., Henry Cejtin wrote:
Does the line
[161519.338536] do_page_fault() command='mlton-compile' type=15
address=0x00000002 in mlton-compile[10000+12c9000]
mean it is trying to fetch from address 2???
On Thu, Jan 6, 2022 at 2:18 PM John David Anglin <dave.ang...@bell.net> wrote:
Some additional info:
[161513.075587] mlton-compile(27627): unaligned access to 0x0000000008011ef9 at
ip=0x0000000000b53d73
[161513.365382] mlton-compile(27627): unaligned access to 0x0000000008011ef9 at
ip=0x0000000000b53d73
[161519.322624] handle_unaligned: 67 callbacks suppressed
[161519.322668] mlton-compile(27627): unaligned access to 0x00000000080908c9 at
ip=0x0000000000dbc84f
[161519.323263] mlton-compile(27627): unaligned access to 0x00000000080908ce at
ip=0x0000000000dbc84f
[161519.326435] mlton-compile(27627): unaligned access to 0x0000000008011d11 at
ip=0x0000000000dc13fb
[161519.329577] mlton-compile(27627): unaligned access to 0x0000000008011d11 at
ip=0x0000000000db98cb
[161519.331724] mlton-compile(27627): unaligned access to 0x0000000008011d11 at
ip=0x0000000000db98f3
[161519.338536] do_page_fault() command='mlton-compile' type=15
address=0x00000002 in mlton-compile[10000+12c9000]
trap #15: Data TLB miss fault
[161519.341747] CPU: 0 PID: 27627 Comm: mlton-compile Not tainted 5.16.0-rc8+ #1
[161519.341770] Hardware name: 9000/800/rp3440
[161519.341792] YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI
[161519.341802] PSW: 00000000000001101011111000001111 Not tainted
[161519.341818] r00-03 000000ff0006be0f 0000000000010e10 000000000809874c
00000000012efdf0
[161519.341839] r04-07 0000000000000000 00000000838ede14 0000000008055634
00000000012efe04
[161519.341855] r08-11 00000000012f0014 00000000012f00a0 0000000008011f13
00000000100dcf74
[161519.341873] r12-15 00000000012f0010 00000000012f007c 0000000008011f13
00000000012f0088
[161519.341890] r16-19 00000000012f00b0 00000000012f0044 00000000100dcf70
0000000080000829
[161519.341907] r20-23 0000000000000000 0000000008044828 0000000000dfd2a8
0000000000000006
[161519.341924] r24-27 0000000000000000 0000000008055628 00000000012efdf0
00000000012d9110
[161519.341941] r28-31 0000000000000002 0000000000000000 00000000f9af49c0
0000000000000000
[161519.341959] sr00-03 0000000006189000 0000000000000000 0000000000000000
0000000006189000
[161519.341978] sr04-07 0000000006189000 0000000006189000 0000000006189000
0000000006189000
[161519.342006] VZOUICununcqcqcqcqcqcrmunTDVZOUI
[161519.342016] FPSR: 10001100000011101101000000000000
[161519.342026] FPER1: 00000000
[161519.342037] fr00-03 8c0ed00000000000 0000000000000000 0000000000000000
0000000000000000
[161519.342053] fr04-07 3b9aca0000000000 61d72b5800000000 16c7bfa123237000
00000001020c49ba
[161519.342070] fr08-11 0000000000000001 0000000000000000 0000000000000000
0000000000000000
[161519.342087] fr12-15 0000000000000000 0000000000000000 0000000000000000
0000000000000000
[161519.342103] fr16-19 0000000000000000 0000000000000000 0000000000000000
0000000000000000
[161519.342118] fr20-23 0000000000000000 0000000000000000 0000004100000011
0000000000000104
[161519.342137] fr24-27 3f7fc07f01fc07f0 4100000000020bd8 41af218000000000
0000000000000000
[161519.342157] fr28-31 2deb33a075f5d1c1 6b17d1f2508fe882 d898c29600000000
0000000000000000
[161519.342191] IASQ: 0000000006189000 0000000006189000 IAOQ: 0000000000dc0ea7
0000000000dc0eab
[161519.342207] IIR: 0f801094 ISR: 0000000006189000 IOR: 0000000000000002
[161519.342221] CPU: 0 CR30: 00000000559f0430 CR31: ffffffffffffffff
[161519.342236] ORIG_R28: 0000000000000000
[161519.342246] IAOQ[0]: 0000000000dc0ea7
[161519.342257] IAOQ[1]: 0000000000dc0eab
[161519.342267] RP(r2): 000000000809874c
dc0e90: 0c 80 10 9c ldw 0(r4),ret0
dc0e94: e8 1f 0f 05 b,l dc061c
<_GLOBAL_OFFSET_TABLE_@@Base-0x52f788>,r0
dc0e98: d0 95 1b c1 extrw,u r4,30,31,r21
dc0e9c: 4b c2 3e 59 ldw -d4(sp),rp
dc0ea0: 08 4b 04 15 sub r11,rp,r21
dc0ea4: 0f 80 10 94 ldw 0(ret0),r20
dc0ea8: 0d 74 12 99 stw r20,-4(r11)
dc0eac: 0f 95 12 80 stw r21,0(ret0)
dc0eb0: 0d 79 10 9c ldw -4(r11),ret0
dc0eb4: d3 94 1b ff extrw,u ret0,31,1,r20
dc0eb8: 86 80 3f d7 cmpib,=,n 0,r20,dc0ea8
<_GLOBAL_OFFSET_TABLE_@@Base-0x52eefc>
dc0ebc: 0f 80 10 94 ldw 0(ret0),r20
dc0ec0: e8 1f 0b cd b,l dc04ac
<_GLOBAL_OFFSET_TABLE_@@Base-0x52f8f8>,r0
dc0ec4: d3 94 1b c1 extrw,u ret0,30,31,r20
Fault occurs on load "ldw 0(ret0),r20" instruction.
Regards,
Dave Anglin
--
John David Anglin dave.ang...@bell.net
--
John David Anglin dave.ang...@bell.net