Package:gcc-3.4
Version:3.4.6-1
Severity:wishlist
Tags:patch

Could you please apply the following patch?
This patch is to fix some problems.

Remove a patahes/autoconf.dpatch because it has not already conflicted.
The following patches have been applied to gcc-3.4 to fix some bugs.
m32r-remove-addsi3.dpatch, m32r-auto.dpatch

Regards,
Kazuhiro Inaoka
diff -urNp ../org/gcc-3.4-3.4.6/debian/changelog gcc-3.4-3.4.6/debian/changelog
--- ../org/gcc-3.4-3.4.6/debian/changelog       2006-05-16 10:42:25.752663200 
+0900
+++ gcc-3.4-3.4.6/debian/changelog      2006-05-16 10:43:03.097769356 +0900
@@ -1,3 +1,12 @@
+gcc-3.4 (3.4.6-1ds01) unstable; urgency=low
+
+  * rules.patch: Removed autoreconf.dpatch for m32r.
+  * debian/patches/m32r-remove-addsi3.dpatch: Fixed FAIL gcc.dg/2004013-1.c.
+  * debian/patches/m32r-auto.dpatch: Fixed target/26775 target/26776.
+  * debian/rule.patch: Added m32r-remove-addsi3 m32r-auto.dpatch.
+
+ -- Kazuhiro Inaoka <[EMAIL PROTECTED]>  Fri, 12 May 2006 19:04:17 +0900
+
 gcc-3.4 (3.4.6-1) unstable; urgency=low
 
   * GCC 3.4.6 release.
diff -urNp ../org/gcc-3.4-3.4.6/debian/patches/m32r-auto.dpatch 
gcc-3.4-3.4.6/debian/patches/m32r-auto.dpatch
--- ../org/gcc-3.4-3.4.6/debian/patches/m32r-auto.dpatch        1970-01-01 
09:00:00.000000000 +0900
+++ gcc-3.4-3.4.6/debian/patches/m32r-auto.dpatch       2006-05-16 
10:43:02.479866874 +0900
@@ -0,0 +1,97 @@
+#! /bin/sh -e
+# 
+#
+# DP: Author: Kazuhiro Inaoka
+# DP: Fixed PR target/26775 target/26776
+
+if [ $# -eq 3 ] && [ "$2" = '-d' ]; then
+    pdir="-d $3"
+    dir="$3/"
+elif [ $# -ne 1 ]; then
+    echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+    exit 1
+fi
+case "$1" in
+       -patch) patch $pdir -f --no-backup-if-mismatch -p1 < $0;;
+       -unpatch) patch $pdir -f --no-backup-if-mismatch -R -p1 < $0;;
+       *)
+               echo >&2 "`basename $0`: script expects -patch|-unpatch as 
argument"
+               exit 1;;
+esac
+
+exit 0
+
+--- gcc/gcc/config/m32r/m32r.c.orig    2006-03-01 16:28:44.000000000 +0900
++++ gcc/gcc/config/m32r/m32r.c 2006-03-21 15:33:53.894564698 +0900
+@@ -2087,11 +2087,19 @@ m32r_output_function_epilogue (FILE * fi
+         else if (reg_offset < 32768)
+           fprintf (file, "\tadd3 %s,%s,%s%d\n",
+                    sp_str, sp_str, IMMEDIATE_PREFIX, reg_offset);
+-        else
++        else if (reg_offset <= 0xffffff)
+           fprintf (file, "\tld24 %s,%s%d\n\tadd %s,%s\n",
+                    reg_names[PROLOGUE_TMP_REGNUM],
+                    IMMEDIATE_PREFIX, reg_offset,
+                    sp_str, reg_names[PROLOGUE_TMP_REGNUM]);
++        else
++          fprintf (file, "\tseth %s,%shigh(%d)\n\tor3 %s,%s,%slow(%d)\n\tadd 
%s,%s\n",
++                   reg_names[PROLOGUE_TMP_REGNUM],
++                   IMMEDIATE_PREFIX, reg_offset,
++                   reg_names[PROLOGUE_TMP_REGNUM],
++                   reg_names[PROLOGUE_TMP_REGNUM],
++                   IMMEDIATE_PREFIX, reg_offset,
++                   sp_str, reg_names[PROLOGUE_TMP_REGNUM]);
+       }
+       else if (frame_pointer_needed)
+       {
+@@ -2102,10 +2110,20 @@ m32r_output_function_epilogue (FILE * fi
+         else if (reg_offset < 32768)
+           fprintf (file, "\tadd3 %s,%s,%s%d\n",
+                    sp_str, fp_str, IMMEDIATE_PREFIX, reg_offset);
++        else if (reg_offset <= 0xffffff)
++          fprintf (file, "\tld24 %s,%s%d\n\tadd %s,%s\n\tmv %s,%s\n",
++                   reg_names[PROLOGUE_TMP_REGNUM],
++                   IMMEDIATE_PREFIX, reg_offset,
++                   reg_names[PROLOGUE_TMP_REGNUM], fp_str,
++                   sp_str, reg_names[PROLOGUE_TMP_REGNUM]);
+         else
+-          fprintf (file, "\tld24 %s,%s%d\n\tadd %s,%s\n",
++          fprintf (file, "\tseth %s,%shigh(%d)\nor3 %s,%s,%slow(%d)\n\tadd 
%s,%s\n\tmv %s,%s\n",
++                   reg_names[PROLOGUE_TMP_REGNUM],
++                   IMMEDIATE_PREFIX, reg_offset,
++                   reg_names[PROLOGUE_TMP_REGNUM],
+                    reg_names[PROLOGUE_TMP_REGNUM],
+                    IMMEDIATE_PREFIX, reg_offset,
++                   reg_names[PROLOGUE_TMP_REGNUM], fp_str,
+                    sp_str, reg_names[PROLOGUE_TMP_REGNUM]);
+       }
+       else
+@@ -2127,8 +2145,26 @@ m32r_output_function_epilogue (FILE * fi
+ 
+       /* Remove varargs area if present.  */
+       if (current_frame_info.pretend_size != 0)
+-      fprintf (file, "\taddi %s,%s%d\n",
+-               sp_str, IMMEDIATE_PREFIX, current_frame_info.pretend_size);
++        if (current_frame_info.pretend_size < 128)
++        fprintf (file, "\taddi %s,%s%d\n",
++                   sp_str, IMMEDIATE_PREFIX, current_frame_info.pretend_size);
++        else if (current_frame_info.pretend_size < 32768)
++        fprintf (file, "\tadd3 %s,%s,%s%d\n",
++                 sp_str, sp_str, IMMEDIATE_PREFIX,
++                 current_frame_info.pretend_size);
++        else if (current_frame_info.pretend_size <= 0xffffff)
++        fprintf (file, "\tld24 %s,%s%d\n\tadd %s,%s\n",
++                 reg_names[PROLOGUE_TMP_REGNUM],
++                 IMMEDIATE_PREFIX, current_frame_info.pretend_size,
++                 sp_str, reg_names[PROLOGUE_TMP_REGNUM]);
++        else
++        fprintf (file, "\tseth %s,%shigh(%d)\n\tor3 %s,%s,%slow(%d)\n\tadd 
%s,%s\n",
++                 reg_names[PROLOGUE_TMP_REGNUM],
++                 IMMEDIATE_PREFIX, current_frame_info.pretend_size,
++                 reg_names[PROLOGUE_TMP_REGNUM],
++                 reg_names[PROLOGUE_TMP_REGNUM],
++                 IMMEDIATE_PREFIX, current_frame_info.pretend_size,
++                 sp_str, reg_names[PROLOGUE_TMP_REGNUM]);
+       
+       /* Emit the return instruction.  */
+       if (M32R_INTERRUPT_P (fn_type))
diff -urNp ../org/gcc-3.4-3.4.6/debian/patches/m32r-remove-addsi3.dpatch 
gcc-3.4-3.4.6/debian/patches/m32r-remove-addsi3.dpatch
--- ../org/gcc-3.4-3.4.6/debian/patches/m32r-remove-addsi3.dpatch       
1970-01-01 09:00:00.000000000 +0900
+++ gcc-3.4-3.4.6/debian/patches/m32r-remove-addsi3.dpatch      2006-05-16 
10:43:02.470868294 +0900
@@ -0,0 +1,134 @@
+#! /bin/sh -e
+# 
+#
+# DP: Author: Kazuhiro Inaoka
+# DP: Fixed FAIL gcc.dg/2004013-1.c.
+
+if [ $# -eq 3 ] && [ "$2" = '-d' ]; then
+    pdir="-d $3"
+    dir="$3/"
+elif [ $# -ne 1 ]; then
+    echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+    exit 1
+fi
+case "$1" in
+       -patch) patch $pdir -f --no-backup-if-mismatch -p1 < $0;;
+       -unpatch) patch $pdir -f --no-backup-if-mismatch -R -p1 < $0;;
+       *)
+               echo >&2 "`basename $0`: script expects -patch|-unpatch as 
argument"
+               exit 1;;
+esac
+
+exit 0
+
+--- gcc-3.4.4/gcc/config/m32r/m32r.c   (revision 109855)
++++ gcc-3.4.4/gcc/config/m32r/m32r.c   (working copy)
+@@ -1028,6 +1028,20 @@
+       {
+       case EQ:
+         if (GET_CODE (y) == CONST_INT
++            && UINT16_P (INTVAL (y))          /* Reg equal to small const.  */
++            && y != const0_rtx)
++          {
++            rtx tmp = gen_reg_rtx (SImode);           
++            
++            emit_insn (gen_xorsi3 (tmp, x, GEN_INT (INTVAL (y))));
++            x = tmp;
++            y = const0_rtx;
++          }
++#if 0
++ /*
++  * Removed for miss optimizing at simplify_relational_operation().
++  */
++        else if (GET_CODE (y) == CONST_INT
+             && CMP_INT16_P (INTVAL (y))               /* Reg equal to small 
const.  */
+             && y != const0_rtx)
+           {
+@@ -1037,6 +1051,7 @@
+             x = tmp;
+             y = const0_rtx;
+           }
++#endif
+         else if (CONSTANT_P (y))                      /* Reg equal to const.  
*/
+           {
+             rtx tmp = force_reg (GET_MODE (x), y);
+@@ -1151,6 +1166,20 @@
+       /* Reg/smallconst equal comparison.  */
+       if (compare_code == EQ
+         && GET_CODE (y) == CONST_INT
++        && UINT16_P (INTVAL (y)))
++      {
++        rtx tmp = gen_reg_rtx (SImode);
++
++        emit_insn (gen_xorsi3 (tmp, x, GEN_INT (INTVAL (y))));
++        return gen_rtx (code, CCmode, tmp, const0_rtx);
++      }
++      
++#if 0
++ /*
++  * Removed for miss optimizing at simplify_relational_operation().
++  */
++      if (compare_code == EQ
++        && GET_CODE (y) == CONST_INT
+         && CMP_INT16_P (INTVAL (y)))
+       {
+         rtx tmp = gen_reg_rtx (SImode);
+@@ -1158,6 +1187,7 @@
+         emit_insn (gen_addsi3 (tmp, x, GEN_INT (-INTVAL (y))));
+         return gen_rtx (code, CCmode, tmp, const0_rtx);
+       }
++#endif
+       
+       /* Reg/const equal comparison.  */
+       if (compare_code == EQ
+Index: m32r.md
+===================================================================
+--- gcc-3.4.4/gcc/config/m32r/m32r.md  (revision 109855)
++++ gcc-3.4.4/gcc/config/m32r/m32r.md  (working copy)
+@@ -1690,7 +1691,7 @@
+       DONE;
+     }
+ 
+-  if (! reg_or_eq_int16_operand (op2, mode))
++  if (! reg_or_uint16_operand (op2, mode))
+     op2 = force_reg (mode, op2);
+ 
+   emit_insn (gen_seq_insn (op0, op1, op2));
+@@ -1752,7 +1753,7 @@
+ (define_insn "seq_insn"
+   [(set (match_operand:SI 0 "register_operand" "=r,r,??r,r")
+       (eq:SI (match_operand:SI 1 "register_operand" "r,r,r,r")
+-             (match_operand:SI 2 "reg_or_eq_int16_operand" "r,r,r,PK")))
++             (match_operand:SI 2 "reg_or_uint16_operand" "r,r,r,K")))
+    (clobber (reg:CC 17))
+    (clobber (match_scratch:SI 3 "=1,2,&r,r"))]
+   "TARGET_M32R"
+@@ -1763,7 +1764,7 @@
+ (define_split
+   [(set (match_operand:SI 0 "register_operand" "")
+       (eq:SI (match_operand:SI 1 "register_operand" "")
+-             (match_operand:SI 2 "reg_or_eq_int16_operand" "")))
++             (match_operand:SI 2 "reg_or_uint16_operand" "")))
+    (clobber (reg:CC 17))
+    (clobber (match_scratch:SI 3 ""))]
+   "TARGET_M32R && reload_completed"
+@@ -1791,10 +1792,15 @@
+       op1 = op3;
+     }
+ 
+-  if (GET_CODE (op2) == CONST_INT && (value = INTVAL (op2)) != 0
+-      && CMP_INT16_P (value))
+-    emit_insn (gen_addsi3 (op3, op1, GEN_INT (-value)));
+-  else
++/*
++ * Removed for miss optimizing at simplify_relational_operation().
++ *
++ *  if (GET_CODE (op2) == CONST_INT && (value = INTVAL (op2)) != 0
++ *      && !(GET_CODE (op1) == REG && REG_POINTER (op1))
++ *      && CMP_INT16_P (value))
++ *    emit_insn (gen_addsi3 (op3, op1, GEN_INT (-value)));
++ *  else
++ */
+     emit_insn (gen_xorsi3 (op3, op1, op2));
+ 
+   emit_insn (gen_cmp_ltusi_insn (op3, GEN_INT (1)));
diff -urNp ../org/gcc-3.4-3.4.6/debian/rules.patch 
gcc-3.4-3.4.6/debian/rules.patch
--- ../org/gcc-3.4-3.4.6/debian/rules.patch     2006-05-16 10:42:25.706670459 
+0900
+++ gcc-3.4-3.4.6/debian/rules.patch    2006-05-16 10:43:00.696148380 +0900
@@ -77,8 +77,8 @@ ifeq ($(DEB_TARGET_ARCH_OS),hurd)
 endif
 
 ifeq ($(DEB_TARGET_GNU_CPU),m32r)
-  debian_patches += autoreconf m32r-gotoff m32r-stack m32r-libffi \
-       m32r-fixes m32r-limits m32r-pie
+  debian_patches += m32r-gotoff m32r-stack m32r-libffi \
+       m32r-fixes m32r-limits m32r-pie m32r-remove-addsi3 m32r-auto
 endif
 ifeq ($(DEB_TARGET_ARCH),alpha)
   debian_patches += alpha-ieee

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