Am 20.04.24 um 16:15 schrieb Daniel Gröber:
On Mon, Apr 01, 2024 at 11:48:16AM +0200, Philipp Klaus Krause wrote:
I use yosys to synthesize for the iCE40UP and GateMate FPGAs. IMO, the
current upstream release 0.38 has substantial improvements over the 0.33
release currently in Debian.
Neat, are the GateMates finally available on the open market then? I'd love
to get my hands on some dev hardware.
Yes, I got the GateMateA1-EVB board from Olimex, since it is
substantially cheaper than the official CologneChips one, and I have no
use for most of the extra features of the CologneChips board:
https://www.olimex.com/Products/FPGA/GateMate/GateMateA1-EVB/open-source-hardware
Are you open to doing some testing for the new package version once I get
around to putting it together? I can do end-to-end testing on ICE40(HX) and
(probably) GW1N (if I can figure out how to flash this thing) maybe
@Jonathan (in CC) can cover ECP5 and you could do ICE40UP and GateMate?
I can do some testing on iCE40UP5 (iCEBreaker board) and GateMateA1
(GateMateA1-EVB board). I run Debian on amd64, arm64, and ppc64 (but so
far used yosys on amd64 only).
I've been meaning to look into what we could use for testing beyond simple
blinkies. Perhaps some CPU? I'd like to have something that can run
internal consistency checks. If anyone has any ideas let me know.
My use-case is basically that: the experimental f8 CPU
(https://sourceforge.net/p/sdcc/code/HEAD/tree/branches/f8/f8/). I
actually use "simple blinkies" for testing": a basic f8-based SoC, that
runs a program on the CPU that does the blinking. However, I write
System Verilog, so I use sv2v (not yet in Debian) as a preprocessor
before feeding my code into yosys.
Philipp
P.S.: I saw that yosys 0.40 was just released. I'll do a quick test of
the upstream release in the next few days.
