Package: verilog
Severity: normal
Tags: patch
When building 'verilog' on amd64 with gcc-4.0,
I get the following error:
g++ -DHAVE_CVS_IDENT=1 -DHAVE_CONFIG_H -I. -I. -Wall -g -O2 -MD -c main.cc -o
main.o
verinum.h:46: error: expected ',' or '...' before '&' token
verinum.h:46: error: ISO C++ forbids declaration of 'string' with no type
verinum.h:93: error: 'string' does not name a type
verinum.h:110: error: expected initializer before '&' token
verinum.h:111: error: expected initializer before '&' token
verireal.h:42: error: ISO C++ forbids declaration of 'ostream' with no type
verireal.h:42: error: 'ostream' is neither function nor member function; cannot
be declared friend
verireal.h:42: error: expected ';' before '&' token
verireal.h:71: error: expected initializer before '&' token
StringHeap.h:104: error: expected ',' or '...' before '&' token
StringHeap.h:104: error: ISO C++ forbids declaration of 'string' with no type
svector.h:104: error: invalid use of constructor as a template
svector.h:104: note: use 'svector<std::string>::svector' instead of
'svector<std::string>::svector<std::string>' to name the constructor in a
qualified name
svector.h:104: error: explicit specialization of
'svector<std::string>::svector(unsigned int)' must be introduced by 'template
<>'
svector.h:104: error: template-id 'svector<>' for
'svector<std::string>::svector(unsigned int)' does not match any template
declaration
svector.h:104: error: invalid function declaration
make[1]: *** [main.o] Error 1
make[1]: Leaving directory `/verilog-0.8'
make: *** [build-stamp] Error 2
With the attached patch 'verilog' can be compiled
on amd64 using gcc-4.0.
Regards
Andreas Jochens
diff -urN ../tmp-orig/verilog-0.8/LineInfo.cc ./LineInfo.cc
--- ../tmp-orig/verilog-0.8/LineInfo.cc 2003-01-17 06:49:03.000000000 +0100
+++ ./LineInfo.cc 2005-03-25 15:42:25.228544875 +0100
@@ -34,12 +34,12 @@
{
}
-string LineInfo::get_line() const
+std::string LineInfo::get_line() const
{
- ostringstream buf;
+ std::ostringstream buf;
buf << (file_? file_ : "") << ":" << lineno_;
- string res = buf.str();
+ std::string res = buf.str();
return res;
}
diff -urN ../tmp-orig/verilog-0.8/LineInfo.h ./LineInfo.h
--- ../tmp-orig/verilog-0.8/LineInfo.h 2003-01-17 06:49:03.000000000 +0100
+++ ./LineInfo.h 2005-03-25 15:41:01.959157457 +0100
@@ -38,7 +38,7 @@
LineInfo();
~LineInfo();
- string get_line() const;
+ std::string get_line() const;
void set_line(const LineInfo&that);
diff -urN ../tmp-orig/verilog-0.8/PTask.h ./PTask.h
--- ../tmp-orig/verilog-0.8/PTask.h 2004-06-01 01:34:36.000000000 +0200
+++ ./PTask.h 2005-03-25 15:42:53.782191212 +0100
@@ -70,7 +70,7 @@
// Elaborate the statement to finish off the task definition.
void elaborate(Design*des, NetScope*scope) const;
- void dump(ostream&, unsigned) const;
+ void dump(std::ostream&, unsigned) const;
private:
svector<PWire*>*ports_;
@@ -106,7 +106,7 @@
/* Elaborate the behavioral statement. */
void elaborate(Design *des, NetScope*) const;
- void dump(ostream&, unsigned) const;
+ void dump(std::ostream&, unsigned) const;
private:
perm_string name_;
diff -urN ../tmp-orig/verilog-0.8/PUdp.h ./PUdp.h
--- ../tmp-orig/verilog-0.8/PUdp.h 2004-03-08 01:47:44.000000000 +0100
+++ ./PUdp.h 2005-03-25 15:55:30.500310451 +0100
@@ -55,20 +55,20 @@
public:
explicit PUdp(perm_string n, unsigned nports);
- svector<string>ports;
+ svector<std::string>ports;
unsigned find_port(const char*name);
bool sequential;
- svector<string>tinput;
+ svector<std::string>tinput;
svector<char> tcurrent;
svector<char> toutput;
verinum::V initial;
- map<string,PExpr*> attributes;
+ std::map<std::string,PExpr*> attributes;
- void dump(ostream&out) const;
+ void dump(std::ostream&out) const;
perm_string name_;
private:
diff -urN ../tmp-orig/verilog-0.8/StringHeap.cc ./StringHeap.cc
--- ../tmp-orig/verilog-0.8/StringHeap.cc 2004-02-18 18:11:54.000000000
+0100
+++ ./StringHeap.cc 2005-03-25 15:58:09.446508855 +0100
@@ -131,7 +131,7 @@
return perm_string(add(text));
}
-perm_string StringHeapLex::make(const string&text)
+perm_string StringHeapLex::make(const std::string&text)
{
return perm_string(add(text.c_str()));
}
diff -urN ../tmp-orig/verilog-0.8/StringHeap.h ./StringHeap.h
--- ../tmp-orig/verilog-0.8/StringHeap.h 2004-02-18 18:11:54.000000000
+0100
+++ ./StringHeap.h 2005-03-25 14:20:05.000000000 +0100
@@ -101,7 +101,7 @@
const char*add(const char*);
perm_string make(const char*);
- perm_string make(const string&);
+ perm_string make(const std::string&);
unsigned add_count() const;
unsigned add_hit_count() const;
diff -urN ../tmp-orig/verilog-0.8/parse_api.h ./parse_api.h
--- ../tmp-orig/verilog-0.8/parse_api.h 2004-02-18 18:11:57.000000000 +0100
+++ ./parse_api.h 2005-03-25 14:23:54.000000000 +0100
@@ -35,8 +35,8 @@
* Verilog source into pform for elaboration. The parser adds modules
* to these maps as it compiles modules in the verilog source.
*/
-extern map<perm_string,Module*> pform_modules;
-extern map<perm_string,PUdp*> pform_primitives;
+extern std::map<perm_string,Module*> pform_modules;
+extern std::map<perm_string,PUdp*> pform_primitives;
/*
* This code actually invokes the parser to make modules. The first
@@ -47,7 +47,7 @@
*/
extern int pform_parse(const char*path, FILE*file =0);
-extern string vl_file;
+extern std::string vl_file;
/*
* $Log: parse_api.h,v $
diff -urN ../tmp-orig/verilog-0.8/svector.h ./svector.h
--- ../tmp-orig/verilog-0.8/svector.h 2003-07-23 04:35:44.000000000 +0200
+++ ./svector.h 2005-03-25 14:21:14.000000000 +0100
@@ -101,8 +101,8 @@
* Override the implementation of the above template for the string
* type parameter. The initialization to nil works different here.
*/
-inline svector<string>::svector<string>(unsigned size)
-: nitems_(size), items_(new string[size])
+template <> inline svector<std::string>::svector(unsigned size)
+: nitems_(size), items_(new std::string[size])
{
}
diff -urN ../tmp-orig/verilog-0.8/util.h ./util.h
--- ../tmp-orig/verilog-0.8/util.h 2004-02-20 19:53:36.000000000 +0100
+++ ./util.h 2005-03-25 14:22:56.000000000 +0100
@@ -44,7 +44,7 @@
verinum val;
};
-extern attrib_list_t* evaluate_attributes(const map<perm_string,PExpr*>&att,
+extern attrib_list_t* evaluate_attributes(const
std::map<perm_string,PExpr*>&att,
unsigned&natt,
const Design*des,
const NetScope*scope);
diff -urN ../tmp-orig/verilog-0.8/verinum.cc ./verinum.cc
--- ../tmp-orig/verilog-0.8/verinum.cc 2004-05-18 20:43:15.000000000 +0200
+++ ./verinum.cc 2005-03-25 15:40:31.411884914 +0100
@@ -41,7 +41,7 @@
}
}
-verinum::verinum(const string&str)
+verinum::verinum(const std::string&str)
: has_len_(true), has_sign_(false), string_flag_(true)
{
nbits_ = str.length() * 8;
@@ -257,7 +257,7 @@
return val;
}
-string verinum::as_string() const
+std::string verinum::as_string() const
{
assert( nbits_%8 == 0 );
if (nbits_ == 0)
@@ -283,7 +283,7 @@
}
tmp[nbits_/8] = 0;
- string result = string(tmp);
+ std::string result = std::string(tmp);
delete[]tmp;
return result;
}
@@ -370,7 +370,7 @@
return tmp;
}
-ostream& operator<< (ostream&o, verinum::V v)
+std::ostream& operator<< (std::ostream&o, verinum::V v)
{
switch (v) {
case verinum::V0:
@@ -393,7 +393,7 @@
* This operator is used by various dumpers to write the verilog
* number in a Verilog format.
*/
-ostream& operator<< (ostream&o, const verinum&v)
+std::ostream& operator<< (std::ostream&o, const verinum&v)
{
if (v.is_string()) {
o << "\"" << v.as_string() << "\"";
diff -urN ../tmp-orig/verilog-0.8/verinum.h ./verinum.h
--- ../tmp-orig/verilog-0.8/verinum.h 2004-02-17 07:52:55.000000000 +0100
+++ ./verinum.h 2005-03-25 14:19:02.000000000 +0100
@@ -43,7 +43,7 @@
enum V { V0 = 0, V1, Vx, Vz };
verinum();
- verinum(const string&str);
+ verinum(const std::string&);
verinum(const V*v, unsigned nbits, bool has_len =true);
verinum(V, unsigned nbits =1, bool has_len =true);
verinum(unsigned long val, unsigned bits);
@@ -90,7 +90,7 @@
unsigned long as_ulong() const;
signed long as_long() const;
- string as_string() const;
+ std::string as_string() const;
private:
V* bits_;
@@ -107,8 +107,8 @@
needed to accurately represent the contained value, signed or not. */
extern verinum trim_vnum(const verinum&);
-extern ostream& operator<< (ostream&, const verinum&);
-extern ostream& operator<< (ostream&, verinum::V);
+extern std::ostream& operator<< (std::ostream&, const verinum&);
+extern std::ostream& operator<< (std::ostream&, verinum::V);
extern verinum::V operator | (verinum::V l, verinum::V r);
extern verinum::V operator & (verinum::V l, verinum::V r);
diff -urN ../tmp-orig/verilog-0.8/verireal.cc ./verireal.cc
--- ../tmp-orig/verilog-0.8/verireal.cc 2004-06-05 01:33:51.000000000 +0200
+++ ./verireal.cc 2005-03-25 15:40:46.869986599 +0100
@@ -124,7 +124,7 @@
return res;
}
-ostream& operator<< (ostream&out, const verireal&v)
+std::ostream& operator<< (std::ostream&out, const verireal&v)
{
out << v.value_;
return out;
diff -urN ../tmp-orig/verilog-0.8/verireal.h ./verireal.h
--- ../tmp-orig/verilog-0.8/verireal.h 2004-06-05 01:33:51.000000000 +0200
+++ ./verireal.h 2005-03-25 14:19:44.000000000 +0100
@@ -39,7 +39,7 @@
class verireal {
- friend ostream& operator<< (ostream&, const verireal&);
+ friend std::ostream& operator<< (std::ostream&, const verireal&);
friend verireal operator* (const verireal&, const verireal&);
friend verireal operator/ (const verireal&, const verireal&);
friend verireal operator/ (const verireal&, const verinum&);
@@ -68,7 +68,7 @@
double value_;
};
-extern ostream& operator<< (ostream&, const verireal&);
+extern std::ostream& operator<< (std::ostream&, const verireal&);
extern verireal operator* (const verireal&, const verireal&);
extern verireal operator/ (const verireal&, const verireal&);
extern verireal operator/ (const verireal&, const verinum&);
--
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