Hi Thiemo! Am Donnerstag, den 03.07.2008, 19:01 +0100 schrieb Thiemo Seufer: > I believe the appended patch is sufficient to add Linux/MIPS support > to openmpi (for both the mips and mipsel variants).
I had a closer look at the patch today because it did not apply against 1.2.8. I hope that I did fix all issue but I'd like you to review it. I'm sorry that it took so long but I was not able to have a look at it earlier. I'm not sure about the libtool issue, I'll give that a try; maybe it's solved by the latest libtool. Thanks in advance and for your work so far! :) Best regards Manuel
--- a/config/ompi_config_asm.m4
+++ b/config/ompi_config_asm.m4
@@ -873,6 +873,18 @@
OMPI_GCC_INLINE_ASSIGN='"bis [$]31,[$]31,%0" : "=&r"(ret)'
;;
+ mips64*-linux-*)
+ ompi_cv_asm_arch="MIPS"
+ OMPI_ASM_SUPPORT_64BIT=1
+ OMPI_GCC_INLINE_ASSIGN='"or %0,[$]0,[$]0" : "=&r"(ret)'
+ ;;
+
+ mips*-linux-*)
+ ompi_cv_asm_arch="MIPS"
+ OMPI_ASM_SUPPORT_64BIT=0
+ OMPI_GCC_INLINE_ASSIGN='"or %0,[$]0,[$]0" : "=&r"(ret)'
+ ;;
+
mips-*|mips64-*)
# Should really find some way to make sure that we are on
# a MIPS III machine (r4000 and later)
--- a/opal/asm/asm-data.txt
+++ b/opal/asm/asm-data.txt
@@ -126,3 +126,7 @@
# means that we can use the same code either way. Woo hoo!
MIPS default-.text-.globl-:--L--1-1-1-1-0 mips-irix
+MIPS default-.text-.globl-:[EMAIL PROTECTED] mips64-linux
+
+# However, this doesn't hold true for 32-bit MIPS as used on Linux.
+MIPS default-.text-.globl-:[EMAIL PROTECTED] mips-linux
--- a/opal/include/opal/sys/mips/atomic.h
+++ b/opal/include/opal/sys/mips/atomic.h
@@ -23,10 +23,17 @@
#if OMPI_WANT_SMP_LOCKS
/* BWB - FIX ME! */
+#ifdef __linux__
+#define MB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory")
+#define RMB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory")
+#define WMB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory")
+#define SMP_SYNC ".set mips2; sync; .set mips0"
+#else
#define MB() __asm__ __volatile__("sync": : :"memory")
#define RMB() __asm__ __volatile__("sync": : :"memory")
#define WMB() __asm__ __volatile__("sync": : :"memory")
#define SMP_SYNC "sync"
+#endif
#else
@@ -46,8 +53,10 @@
#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
#define OPAL_HAVE_ATOMIC_CMPSET_32 1
-#define OPAL_HAVE_ATOMIC_CMPSET_64 1
+#ifdef __mips64
+#define OPAL_HAVE_ATOMIC_CMPSET_64 1
+#endif
/**********************************************************************
*
@@ -92,16 +101,23 @@
int32_t tmp;
__asm__ __volatile__ ("\t"
- ".set noreorder \n"
- "1: \n\t"
- "ll %0, %2 \n\t" /* load *addr into ret */
- "bne %0, %3, 2f \n\t" /* done if oldval != ret */
- "or %5, %4, 0 \n\t" /* ret = newval */
- "sc %5, %2 \n\t" /* store ret in *addr */
+ ".set noreorder \n"
+ "1: \n\t"
+#ifdef __linux__
+ ".set mips2 \n\t"
+#endif
+ "ll %0, %2 \n\t" /* load *addr into ret */
+ "bne %0, %3, 2f \n\t" /* done if oldval != ret */
+ "or %5, %4, 0 \n\t" /* ret = newval */
+ "sc %5, %2 \n\t" /* store ret in *addr */
+#ifdef __linux__
+ ".set mips0 \n\t"
+#endif
/* note: ret will be 0 if failed, 1 if succeeded */
"bne %5, 1, 1b \n\t"
+ "nop \n"
"2: \n\t"
- ".set reorder \n"
+ ".set reorder \n"
: "=&r"(ret), "=m"(*addr)
: "m"(*addr), "r"(oldval), "r"(newval), "r"(tmp)
: "cc", "memory");
@@ -133,7 +149,7 @@
return opal_atomic_cmpset_32(addr, oldval, newval);
}
-
+#ifdef OPAL_HAVE_ATOMIC_CMPSET_64
static inline int opal_atomic_cmpset_64(volatile int64_t *addr,
int64_t oldval, int64_t newval)
{
@@ -141,16 +157,17 @@
int64_t tmp;
__asm__ __volatile__ ("\t"
- ".set noreorder \n"
- "1: \n\t"
- "lld %0, %2 \n\t" /* load *addr into ret */
- "bne %0, %3, 2f \n\t" /* done if oldval != ret */
- "or %5, %4, 0 \n\t" /* tmp = newval */
- "scd %5, %2 \n\t" /* store tmp in *addr */
+ ".set noreorder \n"
+ "1: \n\t"
+ "lld %0, %2 \n\t" /* load *addr into ret */
+ "bne %0, %3, 2f \n\t" /* done if oldval != ret */
+ "or %5, %4, 0 \n\t" /* tmp = newval */
+ "scd %5, %2 \n\t" /* store tmp in *addr */
/* note: ret will be 0 if failed, 1 if succeeded */
- "bne %5, 1, 1b \n"
+ "bne %5, 1, 1b \n\t"
+ "nop \n"
"2: \n\t"
- ".set reorder \n"
+ ".set reorder \n"
: "=&r" (ret), "=m" (*addr)
: "m" (*addr), "r" (oldval), "r" (newval),
"r"(tmp)
@@ -183,6 +200,7 @@
opal_atomic_wmb();
return opal_atomic_cmpset_64(addr, oldval, newval);
}
+#endif /* OPAL_HAVE_ATOMIC_CMPSET_64 */
#endif /* OMPI_GCC_INLINE_ASSEMBLY */
--- a/opal/asm/base/MIPS.asm
+++ b/opal/asm/base/MIPS.asm
@@ -1,26 +1,48 @@
START_FILE
+#ifdef __linux__
+#include <sys/asm.h>
+#else
#include <asm.h>
+#endif
#include <regdef.h>
TEXT
ALIGN(8)
LEAF(opal_atomic_mb)
- sync
+#ifdef __linux__
+ .set mips2
+#endif
+ sync
+#ifdef __linux__
+ .set mips0
+#endif
j ra
END(opal_atomic_mb)
ALIGN(8)
LEAF(opal_atomic_rmb)
- sync
+#ifdef __linux__
+ .set mips2
+#endif
+ sync
+#ifdef __linux__
+ .set mips0
+#endif
j ra
END(opal_atomic_rmb)
LEAF(opal_atomic_wmb)
- sync
+#ifdef __linux__
+ .set mips2
+#endif
+ sync
+#ifdef __linux__
+ .set mips0
+#endif
j ra
END(opal_atomic_wmb)
@@ -28,7 +50,13 @@
LEAF(opal_atomic_cmpset_32)
.set noreorder
retry1:
+#ifdef __linux__
+ .set mips2
+#endif
ll $3, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
bne $3, $5, done1
or $2, $6, 0
sc $2, 0($4)
@@ -45,13 +73,31 @@
LEAF(opal_atomic_cmpset_acq_32)
.set noreorder
retry2:
+#ifdef __linux__
+ .set mips2
+#endif
ll $3, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
bne $3, $5, done2
or $2, $6, 0
+#ifdef __linux__
+ .set mips2
+#endif
sc $2, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
bne $2, 1, retry2
done2:
- sync
+#ifdef __linux__
+ .set mips2
+#endif
+ sync
+#ifdef __linux__
+ .set mips0
+#endif
.set reorder
xor $3,$3,$5
@@ -62,12 +108,30 @@
LEAF(opal_atomic_cmpset_rel_32)
.set noreorder
- sync
+#ifdef __linux__
+ .set mips2
+#endif
+ sync
+#ifdef __linux__
+ .set mips0
+#endif
retry3:
+#ifdef __linux__
+ .set mips2
+#endif
ll $3, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
bne $3, $5, done3
or $2, $6, 0
+#ifdef __linux__
+ .set mips2
+#endif
sc $2, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
bne $2, 1, retry3
done3:
.set reorder
@@ -77,7 +141,7 @@
sltu $2,$3,1
END(opal_atomic_cmpset_rel_32)
-
+#ifdef __mips64
LEAF(opal_atomic_cmpset_64)
.set noreorder
retry4:
@@ -128,3 +192,4 @@
j ra
sltu $3,$4,1
END(opal_atomic_cmpset_rel_64)
+#endif /* __mips64 */
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