> > I still wonder how a 32-bit system can generate an unaligned access trap for > an > access to a 64-bit variable aligned on 32-bit, given that there is, by > definition, no 64-bit memory accesses available on the architecture ?
>From the SPARC V8 manual (this is the 32 bit version of SPARC): Load/Store Instructions ... Integer load and store instructions support byte (8-bit), halfword (16-bit), word (32-bit), and doubleword (64-bit) accesses. ... Alignment Restrictions Halfword accesses must be aligned on a 2-byte boundary, word accesses (which include instruction fetches) must be aligned on a 4-byte boundary, and doubleword accesses must be aligned on an 8-byte boundary. An improperly aligned address causes a load or store instruction to generate a mem_address_not_aligned trap. Sam -- To UNSUBSCRIBE, email to debian-bugs-dist-requ...@lists.debian.org with a subject of "unsubscribe". Trouble? Contact listmas...@lists.debian.org