Package: make
Version: 3.81
X-Debbugs-CC: dir...@debian.org, pou...@bertin.fr
The following makefile has Makefile.foo built only once, but when it
is generated, it is re-read as expected:
$ make all
Makefile:1: Makefile.foo: No such file or directory
printf "all:\n\techo bouh\n" > Makefile.foo
echo bouh
bouh
$ make all
echo bouh
bouh
When the contents have to be generated from volatile information and
one wants it to be regenerated for each run of make, uncommenting
the .PHONY decl does cause the systematic regeneration, but prevents
the re-read, so the new contents are only taken into account on the
next run:
$ make all
Makefile:1: Makefile.foo: No such file or directory
printf "all:\n\techo bouh\n" > Makefile.foo
make: *** No rule to make target `all'. Stop.
$ make all
printf "all:\n\techo bouh\n" > Makefile.foo
echo bouh
bouh
That looks like an unforeseen interaction.
Also to be noticed is that reading "info make 'Force Targets'" may lead
to think that using the "FORCE" idiom here would lead to the same
result, but that in fact it results in an infinite loop.
--- o< ---
include Makefile.foo
Makefile.foo:
printf "all:\n\techo bouh\n" > $@
#.PHONY: Makefile.foo
--- o< ---
This trivial example shows the bug, but the real situation is closer to
the one exposed below, and I'm still looking for a woarkaround.
It does not look like the problem can be worked around by dynamic
generation of the rules inside the main Makefile, since I don't think
we can generate full rules from variable expansion. Any better bet ?
--- o< ---
include Makefile.foo
Makefile.foo:
:> $@
for f in $$(find | tr / .); do \
printf "all: echo_$$f\n" >> $@ ;\
printf "echo_$$f:\n\t@echo $$f\n" >> $@ ;\
done
.PHONY: Makefile.foo
--- o< ---
Without the .PHONY rule, the included makefile is never automatically
regenerated and has to be manually remove. With the phony rule, every
make run uses an included file outdated by one run :
$ make all
Makefile:1: Makefile.foo: No such file or directory
:> Makefile.foo
for f in $(find | tr / .); do \
printf "all: echo_$f\n" >> Makefile.foo ;\
printf "echo_$f:\n\t@echo $f\n" >> Makefile.foo ;\
done
make: *** No rule to make target `all'. Stop.
$ make all
:> Makefile.foo
for f in $(find | tr / .); do \
printf "all: echo_$f\n" >> Makefile.foo ;\
printf "echo_$f:\n\t@echo $f\n" >> Makefile.foo ;\
done
.
..Makefile.foo
..Makefile
$ touch bar
$ make all
:> Makefile.foo
for f in $(find | tr / .); do \
printf "all: echo_$f\n" >> Makefile.foo ;\
printf "echo_$f:\n\t@echo $f\n" >> Makefile.foo ;\
done
.
..Makefile.foo
..Makefile
$ make all
:> Makefile.foo
for f in $(find | tr / .); do \
printf "all: echo_$f\n" >> Makefile.foo ;\
printf "echo_$f:\n\t@echo $f\n" >> Makefile.foo ;\
done
.
..Makefile.foo
..bar
..Makefile
--
Yann Dirson - Bertin Technologies
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