Le lundi 12 décembre 2011 16:16:18, Thomas Preud'homme a écrit : Here is another update:
> 1) Return float result in VFP register(s) Done > 2) Use VFP registers for homogeneous aggregate (see §4.3.5 and §6.1.2.1 in > AAPCS) > 3) Pack 2 consecutive float arguments into one VFP register Done > 4) Refactor the code to make both the patch and the resulting code compact > 5) Support hardfloat ABI in prologue and epilogue Done A few bugs have also been corrected. > The good news is that except for item 3, all these should be much faster > than what was done because less code needs to be changed. Prologue was more difficult than expected, while packing 2 consecutive float arguments into one VFP double precision register easier (though it is a hack). Point 4 is not really a blocker as it could already be uploaded to experimental. Point 2 should be really fast but there is at least one bug remaining in the implementation.
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