Hi Steinar,

On 25 May 2016 at 00:54, Steinar H. Gunderson <sgunder...@bigfoot.com> wrote:
> On Tue, May 24, 2016 at 05:53:34PM +0200, Krzysztof Kozlowski wrote:
>>         exynos->clk = devm_clk_get(dev, "usbdrd30");
>>         if (IS_ERR(exynos->clk)) {
>> +             // On each error path since here we need to
>> +             // revert work done by dwc3_exynos_register_phys()
>>                 dev_err(dev, "couldn't get clock\n");
>>                 return -EINVAL;
>>         }
>>         clk_prepare_enable(exynos->clk);
>
> OK, so I took Mark's advice and moved the phy instantiation towards the end
> of the function (after the regulators have successfully come up). It reduced
> the number of probes, even with the original initramfs, dramatically, so
> it seems to work quite well. It also reduces the text for each deferred probe
> by a lot, since we no longer have the dummy regulator message for each one
> (only the message about “no suspend clk specified” is left). Finally, this
> arrangement reduced the need for extra error handling to a minimum.
>
> Cc-ing Felipe and and linux-usb@, and adding the patch as a reply to this
> message.
>
> /* Steinar */
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> Homepage: https://www.sesse.net/
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Actually their are some missing patches to tune the usb3 phy.

https://lkml.org/lkml/2014/10/31/266

Best Regards
-Anand Moon

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