>Resent-Cc: recipient list not shown: ;
>X-Envelope-Sender: [EMAIL PROTECTED]
>Date: Fri, 18 Jun 1999 15:02:02 +0200
>From: Jean-Philippe Gu?rard <[EMAIL PROTECTED]>
>Content-Type: text/plain; charset=iso-8859-1
>Resent-From: debian-user@lists.debian.org
>X-Mailing-List: <debian-user@lists.debian.org> archive/latest/53589
>X-Loop: debian-user@lists.debian.org
>Precedence: list
>Resent-Sender: [EMAIL PROTECTED]
>
>On Fri, Jun 18, 1999 at 11:08:45AM +0100, Frankie wrote:
>> "Andrew C. Gronosky" wrote:
>> 
>> > Hi,
>> >
>> > My new PC has a Creative AWE64 card and I've been pulling my hair out
>> > trying to configure it. :)  I am running the 2.2.1 kernel with all the
>> > correct modules according to the kernel documentation.  The card is PnP
>> > and I believe I have it configured properly with isapnp.
>
>You should start by reading the following files, in the sound folder of the 
>kernel
>Documentation :
>
>AWE32 
>README.awe
>

I have a Creative AWE64 card and it is fully functional

$ cat /dev/sndstat 
Sound Driver:3.5.4-960630 (Thu Apr 8 17:39:22 WEST 1999 root,
Linux hilbert 2.0.34 #4 Thu Apr 1 13:47:44 WEST 1999 i686 unknown)
Kernel: Linux hilbert 2.0.34 #5 Thu Apr 8 17:40:14 WEST 1999 i686
Config options: 0

Installed drivers: 
Type 1: OPL-2/OPL-3 FM
Type 2: Sound Blaster
Type 7: SB MPU-401

Card config: 
Sound Blaster at 0x220 irq 5 drq 1,5
SB MPU-401 at 0x330 irq 5 drq 0
OPL-2/OPL-3 FM at 0x388 drq 0

Audio devices:
0: Sound Blaster 16 (4.16)

Synth devices:
0: Yamaha OPL-3
1: AWE32-0.4.2c (RAM512k)

Midi devices:
0: Sound Blaster 16

Timers:
0: System clock

Mixers:
0: Sound Blaster
1: AWE32 Equalizer
$ 

What have I done.

i) I looked at the docs Sound-howto, ...

ii) I re-compiled the kernel with the awe-midi patch (not needed with
the new kernels), .

iii) I have used the isapnp+pnpdump program (?not needed with the new
kernels?).

iv) I have edited the file produced by pnpdump.

v) Reboot the system.

I include now my /etc/isapnp.conf file

# $Id: pnpdump.c,v 1.16 1998/10/09 22:19:06 fox Exp $
# This is free software, see the sources for details.
# This software has NO WARRANTY, use at your OWN RISK
#
# For details of this file format, see isapnp.conf(5)
#
# For latest information on isapnp and pnpdump see:
# http://www.roestock.demon.co.uk/isapnptools/
#
# Compiler flags: -DREALTIME -DNEEDSETSCHEDULER
#
# Trying port address 0203
# Trying port address 020b
# Board 1 has serial identifier b9 0c e4 27 da e4 00 8c 0e
# Board 2 has serial identifier 46 08 18 27 4a 94 50 6d 50

# (DEBUG)
(READPORT 0x020b)
(ISOLATE PRESERVE)
(IDENTIFY *)
(VERBOSITY 2)
(CONFLICT (IO FATAL)(IRQ FATAL)(DMA FATAL)(MEM FATAL)) # or WARNING

# Card 1: (serial identifier b9 0c e4 27 da e4 00 8c 0e)
# Vendor Id CTL00e4, Serial Number 216279002, checksum 0xB9.
# Version 1.0, Vendor version 1.0
# ANSI string -->Creative SB AWE64  PnP<--
# Vendor defined tag:  73 02 45 20
#
# Logical device id CTL0045
#     Device supports vendor reserved register @ 0x39
#     Device supports vendor reserved register @ 0x3a
#     Device supports vendor reserved register @ 0x3d
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if 
required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE CTL00e4/216279002 (LD 0
#     ANSI string -->Audio<--

# Multiple choice time, choose one only !

#     Start dependent functions: priority preferred
#       IRQ 5.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 1.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 1))
#       Next DMA channel 5.
#             16 bit DMA only
#             Logical device is not a bus master
#             DMA may not execute in count by byte mode
#             DMA may execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0220
#             IO base alignment 1 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0330
#             Maximum IO base address 0x0330
#             IO base alignment 1 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0330))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0388
#             Maximum IO base address 0x0388
#             IO base alignment 1 bytes
#             Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))

#       Start dependent functions: priority acceptable
#       IRQ 5, 7, 9 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 7 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Next DMA channel 5, 6 or 7.
#             16 bit DMA only
#             Logical device is not a bus master
#             DMA may not execute in count by byte mode
#             DMA may execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0300
#             Maximum IO base address 0x0330
#             IO base alignment 48 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0388
#             Maximum IO base address 0x0388
#             IO base alignment 1 bytes
#             Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))

#       Start dependent functions: priority acceptable
#       IRQ 5, 7, 9 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Next DMA channel 5, 6 or 7.
#             16 bit DMA only
#             Logical device is not a bus master
#             DMA may not execute in count by byte mode
#             DMA may execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0300
#             Maximum IO base address 0x0330
#             IO base alignment 48 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))

#       Start dependent functions: priority acceptable
#       IRQ 5, 7, 9 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Next DMA channel 5, 6 or 7.
#             16 bit DMA only
#             Logical device is not a bus master
#             DMA may not execute in count by byte mode
#             DMA may execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))

#       Start dependent functions: priority acceptable
#       IRQ 5, 7, 9 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0300
#             Maximum IO base address 0x0330
#             IO base alignment 48 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0388
#             Maximum IO base address 0x0388
#             IO base alignment 1 bytes
#             Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))

#       Start dependent functions: priority acceptable
#       IRQ 5, 7, 9 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0300
#             Maximum IO base address 0x0330
#             IO base alignment 48 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))

#       Start dependent functions: priority acceptable
#       IRQ 5, 7, 9 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))

#       Start dependent functions: priority functional
#       IRQ 5, 7, 9 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Next DMA channel 5, 6 or 7.
#             16 bit DMA only
#             Logical device is not a bus master
#             DMA may not execute in count by byte mode
#             DMA may execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0300
#             Maximum IO base address 0x0330
#             IO base alignment 16 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0388
#             Maximum IO base address 0x0394
#             IO base alignment 4 bytes
#             Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))
 (NAME "CTL00e4/216279002[0]{Audio               }")

#     End dependent functions
 (ACT Y)
))
#
# Logical device id CTL7002
#     Device supports vendor reserved register @ 0x39
#     Device supports vendor reserved register @ 0x3a
#     Device supports vendor reserved register @ 0x3d
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if 
required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE CTL00e4/216279002 (LD 1
#     Compatible device id PNPb02f
#     ANSI string -->Game<--

# Multiple choice time, choose one only !

#     Start dependent functions: priority preferred
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0200
#             Maximum IO base address 0x0200
#             IO base alignment 1 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x0200))

#       Start dependent functions: priority acceptable
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0200
#             Maximum IO base address 0x0208
#             IO base alignment 8 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x0200))
 (NAME "CTL00e4/216279002[1]{Game                }")

#     End dependent functions
# (ACT Y)
))
#
# Logical device id CTL0022
#     Device supports vendor reserved register @ 0x39
#     Device supports vendor reserved register @ 0x3a
#     Device supports vendor reserved register @ 0x3d
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if 
required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE CTL00e4/216279002 (LD 2
#     ANSI string -->WaveTable<--

# Multiple choice time, choose one only !

#     Start dependent functions: priority preferred
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0620
#             Maximum IO base address 0x0620
#             IO base alignment 1 bytes
#             Number of IO addresses required: 4
(IO 0 (BASE 0x0620))
(IO 1 (BASE 0x0A20))
(IO 2 (BASE 0x0E20))

#(IO 0 (SIZE 4) (BASE 0x0620))

#       Start dependent functions: priority acceptable
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0620
#             Maximum IO base address 0x0680
#             IO base alignment 32 bytes
#             Number of IO addresses required: 4
# (IO 0 (SIZE 4) (BASE 0x0620))
 (NAME "CTL00e4/216279002[2]{WaveTable           }")

#     End dependent functions
#     Vendor defined tag:  75 01 69 46 35 55
 (ACT Y)
))
# End tag... Checksum 0x00 (OK)

# Card 2: (serial identifier 46 08 18 27 4a 94 50 6d 50)
# Vendor Id TCM5094, Serial Number 135800650, checksum 0x46.
#     Version 1.0, Vendor version 1.0
#     ANSI string -->3Com 3C509B EtherLink III<--
#
# Logical device id TCM5094
#     Device support I/O range check register
#     Device supports vendor reserved register @ 0x39
#     Device supports vendor reserved register @ 0x3a
#     Device supports vendor reserved register @ 0x3d
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if 
required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE TCM5094/135800650 (LD 0
#     Compatible device id PNP80f7
#     IRQ 3, 5, 7, 9, 10, 11, 12 or 15.
#         High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 3 (MODE +E)))
#     Logical device decodes 16 bit IO address lines
#         Minimum IO base address 0x0210
#         Maximum IO base address 0x03e0
#         IO base alignment 16 bytes
#         Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0210))
# (ACT Y)
))
# End tag... Checksum 0x00 (OK)

# Returns all cards to the "Wait for Key" state
(WAITFORKEY)

    At\'e breve

Pedro Quaresma de Almeida
Departamento de Matem\'atica, Faculdade de Ci\^encias e Tecnologia
Universidade de Coimbra
P-3000 COIMBRA, PORTUGAL
e-mail: [EMAIL PROTECTED]
url: http://www.mat.uc.pt/~pedro/
phone: 351 39 791170

Reply via email to