Makefile.am | 2 configure.ac | 3 debian/changelog | 4 docs/relnotes-9.1.html | 3 src/gallium/drivers/llvmpipe/Makefile.am | 17 + src/gallium/drivers/r300/Makefile.am | 1 src/gallium/drivers/r300/compiler/r3xx_vertprog.c | 2 src/gallium/drivers/r300/compiler/radeon_compiler_util.h | 27 ++ src/gallium/drivers/r300/compiler/radeon_emulate_loops.h | 27 ++ src/gallium/drivers/r300/compiler/radeon_inline_literals.c | 24 ++ src/gallium/drivers/r300/compiler/radeon_optimize.c | 2 src/gallium/drivers/r300/compiler/radeon_pair_dead_sources.c | 26 ++ src/gallium/drivers/r300/compiler/radeon_rename_regs.h | 26 ++ src/gallium/drivers/r300/compiler/radeon_swizzle.h | 2 src/gallium/drivers/r300/compiler/radeon_vert_fc.c | 24 ++ src/gallium/drivers/r300/compiler/tests/r300_compiler_tests.c | 39 +++ src/gallium/drivers/r300/compiler/tests/r300_compiler_tests.h | 29 ++ src/gallium/drivers/r300/compiler/tests/radeon_compiler_optimize_tests.c | 75 ++++++ src/gallium/drivers/r300/compiler/tests/radeon_compiler_util_tests.c | 31 ++ src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c | 94 +++++++- src/gallium/drivers/r300/compiler/tests/rc_test_helpers.h | 42 +++ src/gallium/drivers/r300/compiler/tests/unit_test.c | 34 ++ src/gallium/drivers/r300/compiler/tests/unit_test.h | 28 ++ src/gallium/drivers/r600/evergreen_state.c | 5 src/gallium/drivers/r600/r600.h | 1 src/gallium/drivers/r600/r600_hw_context.c | 11 src/gallium/drivers/r600/r600_state_common.c | 6 src/gallium/drivers/radeonsi/r600_blit.c | 15 - src/gallium/drivers/radeonsi/r600_texture.c | 59 ++--- src/gallium/drivers/radeonsi/radeonsi_pipe.h | 16 + src/gallium/drivers/radeonsi/radeonsi_shader.c | 8 src/gallium/drivers/radeonsi/si_state.c | 117 ++++++---- src/gallium/targets/xa-vmwgfx/Makefile.am | 2 src/glx/dri2_glx.c | 15 + src/mapi/glapi/gen/glX_proto_send.py | 4 src/mesa/drivers/dri/intel/intel_screen.c | 2 src/mesa/main/eval.c | 11 src/mesa/main/eval.h | 4 src/mesa/main/version.h | 2 src/mesa/main/vtxfmt.c | 10 src/mesa/state_tracker/st_cb_texture.c | 4 41 files changed, 729 insertions(+), 125 deletions(-)
New commits: commit 5ee216b494597232cb35d09ab6cb8cf25ff18243 Author: Timo Aaltonen <tjaal...@ubuntu.com> Date: Mon Feb 25 11:19:47 2013 +0200 update the changelog diff --git a/debian/changelog b/debian/changelog index dcae15f..b19778c 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,6 +1,6 @@ -mesa (9.1~rc2-1) UNRELEASED; urgency=low +mesa (9.1-1) UNRELEASED; urgency=low - * New upstream release candidate. + * New upstream release. - Set close on exec flag when opening dri devices (Closes: #651370). [ Julien Cristau ] commit 17493b8848d4ba9e4b2315f56f511740cfb351b6 Author: Ian Romanick <ian.d.roman...@intel.com> Date: Fri Feb 22 13:52:16 2013 -0800 docs: Update relelase notes diff --git a/docs/relnotes-9.1.html b/docs/relnotes-9.1.html index 75e82ba..24ba9f9 100644 --- a/docs/relnotes-9.1.html +++ b/docs/relnotes-9.1.html @@ -14,7 +14,7 @@ <iframe src="contents.html"></iframe> <div class="content"> -<h1>Mesa 9.1 Release Notes / date TBD</h1> +<h1>Mesa 9.1 Release Notes / date February 22, 2013</h1> <p> Mesa 9.1 is a new development release. @@ -56,6 +56,7 @@ Note: some of the new features are only available with certain drivers. <li>GL_OES_depth_texture_cube_map</li> <li>OpenGL 3.1 core profile support on Radeon HD2000 up to HD6000 series </li> <li>Multisample anti-aliasing support on Radeon X1000 series</li> +<li>OpenGL ES 3.0 support on Intel HD Graphics 2000, 2500, 3000, and 4000</li> </ul> commit 3ea699ff3c6d946a5c58b01f301e01ada19408ef Author: Ian Romanick <ian.d.roman...@intel.com> Date: Fri Feb 22 13:50:09 2013 -0800 mesa: Bump version to 9.1 (final) Signed-off-by: Ian Romanick <ian.d.roman...@intel.com> diff --git a/Makefile.am b/Makefile.am index be42097..a1f7bce 100644 --- a/Makefile.am +++ b/Makefile.am @@ -36,7 +36,7 @@ check-local: # Rules for making release tarballs -PACKAGE_VERSION=9.1-rc2 +PACKAGE_VERSION=9.1 PACKAGE_DIR = Mesa-$(PACKAGE_VERSION) PACKAGE_NAME = MesaLib-$(PACKAGE_VERSION) diff --git a/src/mesa/main/version.h b/src/mesa/main/version.h index a99381a..a98aadf 100644 --- a/src/mesa/main/version.h +++ b/src/mesa/main/version.h @@ -35,7 +35,7 @@ struct gl_context; #define MESA_MAJOR 9 #define MESA_MINOR 1 #define MESA_PATCH 0 -#define MESA_VERSION_STRING "9.1-rc2" +#define MESA_VERSION_STRING "9.1" /* To make version comparison easy */ #define MESA_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) commit ea38e7e2e3d00b003172d94c44cd4b520c47d4df Author: Ian Romanick <ian.d.roman...@intel.com> Date: Fri Feb 22 13:55:44 2013 -0800 i965: Enable OpenGL ES 3.0 on Sandy Bridge Regardless of what we put in the screen structure, all of the extensions that compute_version_es2 checks are present and 3.0 will be exposed anyway. NOTE: This is a candidate for the 9.1 branch. Signed-off-by: Ian Romanick <ian.d.roman...@intel.com> (cherry picked from commit 7ae6864f0dbec33270c83c4181a8182139662d0f) diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index b39bc46..5ec93f1 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -1056,7 +1056,7 @@ set_max_gl_versions(struct intel_screen *screen) screen->max_gl_core_version = 31; screen->max_gl_compat_version = 30; screen->max_gl_es1_version = 11; - screen->max_gl_es2_version = 20; + screen->max_gl_es2_version = 30; break; case 5: case 4: commit 4212dbae1cbbc01454ab660f08513f0910cef37b Author: Alex Deucher <alexander.deuc...@amd.com> Date: Fri Feb 22 18:42:33 2013 -0500 r600g: fixup PS_PARTIAL_FLUSH flag handling for cayman So we don't emit it twice if we ever use the flag on cayman. Note: this is a candidate for the 9.1 branch. Signed-off-by: Alex Deucher <alexander.deuc...@amd.com> (cherry picked from commit 8b5acad0e985215b46fc1cfc8ad87c8771a11a3a) diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c index 9f0a1f3..9091ec0 100644 --- a/src/gallium/drivers/r600/r600_hw_context.c +++ b/src/gallium/drivers/r600/r600_hw_context.c @@ -622,11 +622,6 @@ void r600_flush_emit(struct r600_context *rctx) return; } - if (rctx->flags & R600_CONTEXT_PS_PARTIAL_FLUSH) { - cs->buf[cs->cdw++] = PKT3(PKT3_EVENT_WRITE, 0, 0); - cs->buf[cs->cdw++] = EVENT_TYPE(EVENT_TYPE_PS_PARTIAL_FLUSH) | EVENT_INDEX(4); - } - if (rctx->flags & R600_CONTEXT_WAIT_3D_IDLE) { wait_until |= S_008040_WAIT_3D_IDLE(1); } @@ -638,11 +633,15 @@ void r600_flush_emit(struct r600_context *rctx) /* Use of WAIT_UNTIL is deprecated on Cayman+ */ if (rctx->family >= CHIP_CAYMAN) { /* emit a PS partial flush on Cayman/TN */ - cs->buf[cs->cdw++] = PKT3(PKT3_EVENT_WRITE, 0, 0); - cs->buf[cs->cdw++] = EVENT_TYPE(EVENT_TYPE_PS_PARTIAL_FLUSH) | EVENT_INDEX(4); + rctx->flags |= R600_CONTEXT_PS_PARTIAL_FLUSH; } } + if (rctx->flags & R600_CONTEXT_PS_PARTIAL_FLUSH) { + cs->buf[cs->cdw++] = PKT3(PKT3_EVENT_WRITE, 0, 0); + cs->buf[cs->cdw++] = EVENT_TYPE(EVENT_TYPE_PS_PARTIAL_FLUSH) | EVENT_INDEX(4); + } + if (rctx->chip_class >= R700 && (rctx->flags & R600_CONTEXT_FLUSH_AND_INV_CB_META)) { cs->buf[cs->cdw++] = PKT3(PKT3_EVENT_WRITE, 0, 0); commit a650092fd6e5a78bc04832c485361c11f7200e80 Author: Alex Deucher <alexander.deuc...@amd.com> Date: Fri Feb 22 17:04:43 2013 -0500 r600g: r6xx deadlock workaround (v6) Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=50655 https://bugs.freedesktop.org/show_bug.cgi?id=47116 v2: flush along with workaround. v3: just need a flush v4: try WAIT_UNTIL v5: switch to PS partial flush v6: rework patch Note: this is a candidate for the 9.1 branch. Signed-off-by: Alex Deucher <alexander.deuc...@amd.com> (cherry picked from commit 8442b67f5f3aedbfdb4446164dd09d4eaeda4888) diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c index c03ce3d..88bb62b 100644 --- a/src/gallium/drivers/r600/r600_state_common.c +++ b/src/gallium/drivers/r600/r600_state_common.c @@ -1359,6 +1359,12 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info rctx->vgt_state.atom.dirty = true; } + /* Workaround for hardware deadlock on certain R600 ASICs: write into a CB register. */ + if (rctx->chip_class == R600) { + rctx->flags |= R600_CONTEXT_PS_PARTIAL_FLUSH; + rctx->cb_misc_state.atom.dirty = true; + } + /* Emit states. */ r600_need_cs_space(rctx, ib.user_buffer ? 5 : 0, TRUE); r600_flush_emit(rctx); commit 11d9f75f01c96658a6413dc07a0f0f102397aead Author: Alex Deucher <alexander.deuc...@amd.com> Date: Fri Feb 22 17:02:54 2013 -0500 r600g: add PS_PARTIAL_FLUSH flag PS_PARTIAL flushes seems to be required in certain cases to prevent hangs, especially on r6xx. Note: this is a candidate for the 9.1 branch. Signed-off-by: Alex Deucher <alexander.deuc...@amd.com> (cherry picked from commit 7ebf83f109db9dde89830d5844107c936cf42e4d) diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h index 08b77e4..11dbb3b 100644 --- a/src/gallium/drivers/r600/r600.h +++ b/src/gallium/drivers/r600/r600.h @@ -151,6 +151,7 @@ struct r600_so_target { #define R600_CONTEXT_WAIT_CP_DMA_IDLE (1 << 3) #define R600_CONTEXT_FLUSH_AND_INV (1 << 4) #define R600_CONTEXT_FLUSH_AND_INV_CB_META (1 << 5) +#define R600_CONTEXT_PS_PARTIAL_FLUSH (1 << 6) struct r600_context; struct r600_screen; diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c index 44a9c82..9f0a1f3 100644 --- a/src/gallium/drivers/r600/r600_hw_context.c +++ b/src/gallium/drivers/r600/r600_hw_context.c @@ -622,6 +622,11 @@ void r600_flush_emit(struct r600_context *rctx) return; } + if (rctx->flags & R600_CONTEXT_PS_PARTIAL_FLUSH) { + cs->buf[cs->cdw++] = PKT3(PKT3_EVENT_WRITE, 0, 0); + cs->buf[cs->cdw++] = EVENT_TYPE(EVENT_TYPE_PS_PARTIAL_FLUSH) | EVENT_INDEX(4); + } + if (rctx->flags & R600_CONTEXT_WAIT_3D_IDLE) { wait_until |= S_008040_WAIT_3D_IDLE(1); } commit 6427e1609e1a0a6ecffcec7320e94139d5e584f0 Author: Lauri Kasanen <c...@gmx.com> Date: Fri Feb 22 22:25:58 2013 +0200 configure: Fix build with automake < 1.11 Commit 86d30dea3c13d29ef8d39bc18db63a0441051975 broke building with older automake versions with this error: Makefile:769: *** Recursive variable am__v_YACC_ references itself (eventually). Stop. This patch fixes it. Fix stolen from xorg-macros. Signed-off-by: Lauri Kasanen <c...@gmx.com> (cherry picked from commit 0a82828ad53bfd8395614be48d33fc522d15f6c4) diff --git a/configure.ac b/configure.ac index 9784303..5701f8a 100644 --- a/configure.ac +++ b/configure.ac @@ -20,7 +20,8 @@ echo \#buildapi-variable-no-builddir >/dev/null # Support silent build rules, requires at least automake-1.11. Disable # by either passing --disable-silent-rules to configure or passing V=1 # to make -m4_ifdef([AM_SILENT_RULES], [AM_SILENT_RULES([yes])]) +m4_ifdef([AM_SILENT_RULES], [AM_SILENT_RULES([yes])], + [AC_SUBST([AM_DEFAULT_VERBOSITY], [1])]) m4_ifdef([AM_PROG_AR], [AM_PROG_AR]) commit 47f7f803ae4a92365087d01d284623008bd9a2c8 Author: Michel Dänzer <michel.daen...@amd.com> Date: Fri Feb 15 15:54:28 2013 +0100 radeonsi: Fix PIPE_FORMAT_X32_S8X24_UINT sampler hardware format 4 more little piglits. NOTE: This is a candidate for the 9.1 branch. (cherry picked from commit 9c1107b3e1a4f9f932728d53a8a7961ac948521e) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 21399bf..a6b1983 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -1155,7 +1155,6 @@ static uint32_t si_translate_texformat(struct pipe_screen *screen, case PIPE_FORMAT_Z24_UNORM_S8_UINT: return V_008F14_IMG_DATA_FORMAT_8_24; case PIPE_FORMAT_X8Z24_UNORM: - case PIPE_FORMAT_X32_S8X24_UINT: case PIPE_FORMAT_S8X24_UINT: case PIPE_FORMAT_S8_UINT_Z24_UNORM: return V_008F14_IMG_DATA_FORMAT_24_8; @@ -1163,6 +1162,7 @@ static uint32_t si_translate_texformat(struct pipe_screen *screen, return V_008F14_IMG_DATA_FORMAT_8; case PIPE_FORMAT_Z32_FLOAT: return V_008F14_IMG_DATA_FORMAT_32; + case PIPE_FORMAT_X32_S8X24_UINT: case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: return V_008F14_IMG_DATA_FORMAT_X24_8_32; default: commit cb8bacd87a5b53421bd49cd6656d4dbc019414fa Author: Michel Dänzer <michel.daen...@amd.com> Date: Fri Feb 15 11:30:50 2013 +0100 radeonsi: Use stencil surface level information for stencil texturing 7 more little dwarves^W piglits. NOTE: This is a candidate for the 9.1 branch. (cherry picked from commit 8356962853727136f3316ed227fb7bfe98e2f2bd) diff --git a/src/gallium/drivers/radeonsi/r600_texture.c b/src/gallium/drivers/radeonsi/r600_texture.c index 9160439..153df00 100644 --- a/src/gallium/drivers/radeonsi/r600_texture.c +++ b/src/gallium/drivers/radeonsi/r600_texture.c @@ -150,8 +150,7 @@ static int r600_init_surface(struct r600_screen *rscreen, surface->flags |= RADEON_SURF_SCANOUT; } - if ((ptex->bind & PIPE_BIND_DEPTH_STENCIL) && - !is_flushed_depth && is_depth) { + if (!is_flushed_depth && is_depth) { surface->flags |= RADEON_SURF_ZBUFFER; if (is_stencil) { diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 1eae9b0..21399bf 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -2064,6 +2064,7 @@ static struct pipe_sampler_view *si_create_sampler_view(struct pipe_context *ctx unsigned char state_swizzle[4], swizzle[4]; unsigned height, depth, width; enum pipe_format pipe_format = state->format; + struct radeon_surface_level *surflevel; int first_non_void; uint64_t va; @@ -2083,6 +2084,8 @@ static struct pipe_sampler_view *si_create_sampler_view(struct pipe_context *ctx state_swizzle[2] = state->swizzle_b; state_swizzle[3] = state->swizzle_a; + surflevel = tmp->surface.level; + /* Texturing with separate depth and stencil. */ if (tmp->is_depth && !tmp->is_flushing_texture) { switch (pipe_format) { @@ -2098,6 +2101,7 @@ static struct pipe_sampler_view *si_create_sampler_view(struct pipe_context *ctx case PIPE_FORMAT_S8X24_UINT: case PIPE_FORMAT_X32_S8X24_UINT: pipe_format = PIPE_FORMAT_S8_UINT; + surflevel = tmp->surface.stencil_level; break; default:; } @@ -2170,10 +2174,10 @@ static struct pipe_sampler_view *si_create_sampler_view(struct pipe_context *ctx /* not supported any more */ //endian = si_colorformat_endian_swap(format); - width = tmp->surface.level[0].npix_x; - height = tmp->surface.level[0].npix_y; - depth = tmp->surface.level[0].npix_z; - pitch = tmp->surface.level[0].nblk_x * util_format_get_blockwidth(pipe_format); + width = surflevel[0].npix_x; + height = surflevel[0].npix_y; + depth = surflevel[0].npix_z; + pitch = surflevel[0].nblk_x * util_format_get_blockwidth(pipe_format); if (texture->target == PIPE_TEXTURE_1D_ARRAY) { height = 1; @@ -2183,7 +2187,7 @@ static struct pipe_sampler_view *si_create_sampler_view(struct pipe_context *ctx } va = r600_resource_va(ctx->screen, texture); - va += tmp->surface.level[0].offset; + va += surflevel[0].offset; view->state[0] = va >> 8; view->state[1] = (S_008F14_BASE_ADDRESS_HI(va >> 40) | S_008F14_DATA_FORMAT(format) | commit 0d08abd461e99863b195d879d40c075f63b0d6b6 Author: Michel Dänzer <michel.daen...@amd.com> Date: Fri Feb 15 11:11:22 2013 +0100 radeonsi: properly implement S8Z24 depth-stencil format Based on r600g commit 2b9659c9e627ad03160899b8be04f96307d098eb . Fixes crashes with 4 piglit tests which are now hitting these formats. NOTE: This is a candidate for the 9.1 branch. (cherry picked from commit f9adf7987601197641cd0d851e47b45c5c416f00) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 2d11a97..1eae9b0 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -314,6 +314,8 @@ static void si_update_fb_rs_state(struct r600_context *rctx) offset_units = rctx->queued.named.rasterizer->offset_units; switch (rctx->framebuffer.zsbuf->texture->format) { + case PIPE_FORMAT_S8_UINT_Z24_UNORM: + case PIPE_FORMAT_X8Z24_UNORM: case PIPE_FORMAT_Z24X8_UNORM: case PIPE_FORMAT_Z24_UNORM_S8_UINT: depth = -24; @@ -774,6 +776,7 @@ static uint32_t si_translate_colorformat(enum pipe_format format) case PIPE_FORMAT_Z24_UNORM_S8_UINT: return V_028C70_COLOR_8_24; + case PIPE_FORMAT_S8X24_UINT: case PIPE_FORMAT_X8Z24_UNORM: case PIPE_FORMAT_S8_UINT_Z24_UNORM: return V_028C70_COLOR_24_8; @@ -950,9 +953,10 @@ static uint32_t si_translate_colorswap(enum pipe_format format) case PIPE_FORMAT_Z24_UNORM_S8_UINT: return V_028C70_SWAP_STD; + case PIPE_FORMAT_S8X24_UINT: case PIPE_FORMAT_X8Z24_UNORM: case PIPE_FORMAT_S8_UINT_Z24_UNORM: - return V_028C70_SWAP_STD; + return V_028C70_SWAP_STD_REV; case PIPE_FORMAT_R10G10B10A2_UNORM: case PIPE_FORMAT_R10G10B10X2_SNORM: @@ -1114,9 +1118,11 @@ static uint32_t si_translate_dbformat(enum pipe_format format) switch (format) { case PIPE_FORMAT_Z16_UNORM: return V_028040_Z_16; + case PIPE_FORMAT_S8_UINT_Z24_UNORM: + case PIPE_FORMAT_X8Z24_UNORM: case PIPE_FORMAT_Z24X8_UNORM: case PIPE_FORMAT_Z24_UNORM_S8_UINT: - return V_028040_Z_24; /* XXX no longer supported on SI */ + return V_028040_Z_24; /* deprecated on SI */ case PIPE_FORMAT_Z32_FLOAT: case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: return V_028040_Z_32_FLOAT; @@ -1149,10 +1155,10 @@ static uint32_t si_translate_texformat(struct pipe_screen *screen, case PIPE_FORMAT_Z24_UNORM_S8_UINT: return V_008F14_IMG_DATA_FORMAT_8_24; case PIPE_FORMAT_X8Z24_UNORM: - case PIPE_FORMAT_S8_UINT_Z24_UNORM: - return V_008F14_IMG_DATA_FORMAT_24_8; case PIPE_FORMAT_X32_S8X24_UINT: case PIPE_FORMAT_S8X24_UINT: + case PIPE_FORMAT_S8_UINT_Z24_UNORM: + return V_008F14_IMG_DATA_FORMAT_24_8; case PIPE_FORMAT_S8_UINT: return V_008F14_IMG_DATA_FORMAT_8; case PIPE_FORMAT_Z32_FLOAT: @@ -1520,6 +1526,8 @@ static unsigned si_tile_mode_index(struct r600_resource_texture *rtex, unsigned switch (rtex->real_format) { case PIPE_FORMAT_Z16_UNORM: return 5; + case PIPE_FORMAT_S8_UINT_Z24_UNORM: + case PIPE_FORMAT_X8Z24_UNORM: case PIPE_FORMAT_Z24X8_UNORM: case PIPE_FORMAT_Z24_UNORM_S8_UINT: case PIPE_FORMAT_Z32_FLOAT: @@ -2081,6 +2089,11 @@ static struct pipe_sampler_view *si_create_sampler_view(struct pipe_context *ctx case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: pipe_format = PIPE_FORMAT_Z32_FLOAT; break; + case PIPE_FORMAT_X8Z24_UNORM: + case PIPE_FORMAT_S8_UINT_Z24_UNORM: + /* Z24 is always stored like this. */ + pipe_format = PIPE_FORMAT_Z24X8_UNORM; + break; case PIPE_FORMAT_X24S8_UINT: case PIPE_FORMAT_S8X24_UINT: case PIPE_FORMAT_X32_S8X24_UINT: @@ -2091,35 +2104,59 @@ static struct pipe_sampler_view *si_create_sampler_view(struct pipe_context *ctx } desc = util_format_description(pipe_format); - util_format_compose_swizzles(desc->swizzle, state_swizzle, swizzle); - first_non_void = util_format_get_first_non_void_channel(pipe_format); - if (first_non_void < 0) { - num_format = V_008F14_IMG_NUM_FORMAT_FLOAT; - } else if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB) { - num_format = V_008F14_IMG_NUM_FORMAT_SRGB; + if (desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS) { + const unsigned char swizzle_xxxx[4] = {0, 0, 0, 0}; + const unsigned char swizzle_yyyy[4] = {1, 1, 1, 1}; + + switch (pipe_format) { + case PIPE_FORMAT_S8_UINT_Z24_UNORM: + case PIPE_FORMAT_X24S8_UINT: + case PIPE_FORMAT_X32_S8X24_UINT: + case PIPE_FORMAT_X8Z24_UNORM: + util_format_compose_swizzles(swizzle_yyyy, state_swizzle, swizzle); + break; + default: + util_format_compose_swizzles(swizzle_xxxx, state_swizzle, swizzle); + } } else { - num_format = V_008F14_IMG_NUM_FORMAT_UNORM; + util_format_compose_swizzles(desc->swizzle, state_swizzle, swizzle); + } - switch (desc->channel[first_non_void].type) { - case UTIL_FORMAT_TYPE_FLOAT: + first_non_void = util_format_get_first_non_void_channel(pipe_format); + + switch (pipe_format) { + case PIPE_FORMAT_S8_UINT_Z24_UNORM: + num_format = V_008F14_IMG_NUM_FORMAT_UNORM; + break; + default: + if (first_non_void < 0) { num_format = V_008F14_IMG_NUM_FORMAT_FLOAT; - break; - case UTIL_FORMAT_TYPE_SIGNED: - if (desc->channel[first_non_void].normalized) - num_format = V_008F14_IMG_NUM_FORMAT_SNORM; - else if (desc->channel[first_non_void].pure_integer) - num_format = V_008F14_IMG_NUM_FORMAT_SINT; - else - num_format = V_008F14_IMG_NUM_FORMAT_SSCALED; - break; - case UTIL_FORMAT_TYPE_UNSIGNED: - if (desc->channel[first_non_void].normalized) - num_format = V_008F14_IMG_NUM_FORMAT_UNORM; - else if (desc->channel[first_non_void].pure_integer) - num_format = V_008F14_IMG_NUM_FORMAT_UINT; - else - num_format = V_008F14_IMG_NUM_FORMAT_USCALED; + } else if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB) { + num_format = V_008F14_IMG_NUM_FORMAT_SRGB; + } else { + num_format = V_008F14_IMG_NUM_FORMAT_UNORM; + + switch (desc->channel[first_non_void].type) { + case UTIL_FORMAT_TYPE_FLOAT: + num_format = V_008F14_IMG_NUM_FORMAT_FLOAT; + break; + case UTIL_FORMAT_TYPE_SIGNED: + if (desc->channel[first_non_void].normalized) + num_format = V_008F14_IMG_NUM_FORMAT_SNORM; + else if (desc->channel[first_non_void].pure_integer) + num_format = V_008F14_IMG_NUM_FORMAT_SINT; + else + num_format = V_008F14_IMG_NUM_FORMAT_SSCALED; + break; + case UTIL_FORMAT_TYPE_UNSIGNED: + if (desc->channel[first_non_void].normalized) + num_format = V_008F14_IMG_NUM_FORMAT_UNORM; + else if (desc->channel[first_non_void].pure_integer) + num_format = V_008F14_IMG_NUM_FORMAT_UINT; + else + num_format = V_008F14_IMG_NUM_FORMAT_USCALED; + } } } commit 5baa8ec737e82bbfec1561b4018bae9804d708fd Author: Michel Dänzer <michel.daen...@amd.com> Date: Wed Feb 13 15:57:23 2013 +0100 radeonsi: Fix w component of TGSI_SEMANTIC_POSITION fragment shader inputs. It's the reciprocal of the register value. Fixes piglit fragcoord_w and glsl-fs-fragcoord-zw-perspective. NOTE: This is a candidate for the 9.1 branch. (cherry picked from commit 954bc4ac34b821cdc4ecb3ea8e394a66bcc2dda0) diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c b/src/gallium/drivers/radeonsi/radeonsi_shader.c index 7c57f4c..2545634 100644 --- a/src/gallium/drivers/radeonsi/radeonsi_shader.c +++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c @@ -263,6 +263,14 @@ static void declare_input_fs( build_intrinsic(base->gallivm->builder, "llvm.SI.fs.read.pos", input_type, args, 1, LLVMReadNoneAttribute); + + if (chan == 3) + /* RCP for fragcoord.w */ + si_shader_ctx->radeon_bld.inputs[soa_index] = + LLVMBuildFDiv(gallivm->builder, + lp_build_const_float(gallivm, 1.0f), + si_shader_ctx->radeon_bld.inputs[soa_index], + ""); } return; } commit 0c3b96a6c69861ecf25debb27aeed17302693094 Author: Michel Dänzer <michel.daen...@amd.com> Date: Mon Feb 18 11:29:18 2013 +0100 radeonsi: Fix blending using destination alpha factor but non-alpha destination 11 more little piglits. NOTE: This is a candidate for the 9.1 branch. Reviewed-by: Marek Olšák <mar...@gmail.com> (cherry picked from commit 95bced59293bc3dffad955b714c142455aa05aa8) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 072d8b1..2d11a97 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -1583,7 +1583,7 @@ static void si_cb(struct r600_context *rctx, struct si_pm4_state *pm4, struct r600_surface *surf; unsigned level = state->cbufs[cb]->u.tex.level; unsigned pitch, slice; - unsigned color_info; + unsigned color_info, color_attrib; unsigned tile_mode_index; unsigned format, swap, ntype, endian; uint64_t offset; @@ -1671,6 +1671,9 @@ static void si_cb(struct r600_context *rctx, struct si_pm4_state *pm4, S_028C70_NUMBER_TYPE(ntype) | S_028C70_ENDIAN(endian); + color_attrib = S_028C74_TILE_MODE_INDEX(tile_mode_index) | + S_028C74_FORCE_DST_ALPHA_1(desc->swizzle[3] == UTIL_FORMAT_SWIZZLE_1); + offset += r600_resource_va(rctx->context.screen, state->cbufs[cb]->texture); offset >>= 8; @@ -1688,8 +1691,7 @@ static void si_cb(struct r600_context *rctx, struct si_pm4_state *pm4, S_028C6C_SLICE_MAX(state->cbufs[cb]->u.tex.last_layer)); } si_pm4_set_reg(pm4, R_028C70_CB_COLOR0_INFO + cb * 0x3C, color_info); - si_pm4_set_reg(pm4, R_028C74_CB_COLOR0_ATTRIB + cb * 0x3C, - S_028C74_TILE_MODE_INDEX(tile_mode_index)); + si_pm4_set_reg(pm4, R_028C74_CB_COLOR0_ATTRIB + cb * 0x3C, color_attrib); /* Determine pixel shader export format */ max_comp_size = si_colorformat_max_comp_size(format); commit 24e8ad62046954411b940229f0ade3f55ce0817c Author: Marek Olšák <mar...@gmail.com> Date: Tue Feb 19 17:36:59 2013 +0100 radeonsi: implement 3D transfers That means we can map and read multiple slices with one transfer_map call. [ Cherry-picked from r600g commit 1aebb6911e9aa1bd8900868b58d1750ca83a20c7 ] 11 more little piglits on master, 1 more on the 9.1 branch (Marek's glTex(Sub)Image improvements on master broke the other 10). NOTE: This is a candidate for the 9.1 branch. Reviewed-by: Alex Deucher <alexander.deuc...@amd.com> (cherry picked from commit 72f4490b551d118c726a516359b804ae7425333e) diff --git a/src/gallium/drivers/radeonsi/r600_texture.c b/src/gallium/drivers/radeonsi/r600_texture.c index b7da5ac..9160439 100644 --- a/src/gallium/drivers/radeonsi/r600_texture.c +++ b/src/gallium/drivers/radeonsi/r600_texture.c @@ -55,7 +55,7 @@ static void r600_copy_from_staging_texture(struct pipe_context *ctx, struct r600 struct pipe_resource *texture = transfer->resource; struct pipe_box sbox; - u_box_origin_2d(transfer->box.width, transfer->box.height, &sbox); + u_box_3d(0, 0, 0, transfer->box.width, transfer->box.height, transfer->box.depth, &sbox); ctx->resource_copy_region(ctx, texture, transfer->level, transfer->box.x, transfer->box.y, transfer->box.z, @@ -236,7 +236,6 @@ static void *si_texture_transfer_map(struct pipe_context *ctx, { struct r600_context *rctx = (struct r600_context *)ctx; struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture; - struct pipe_resource resource; struct r600_transfer *trans; boolean use_staging_texture = FALSE; struct radeon_winsys_cs_handle *buf; @@ -296,42 +295,52 @@ static void *si_texture_transfer_map(struct pipe_context *ctx, level, level, box->z, box->z + box->depth - 1); trans->transfer.stride = staging_depth->surface.level[level].pitch_bytes; + trans->transfer.layer_stride = staging_depth->surface.level[level].slice_size; trans->offset = r600_texture_get_offset(staging_depth, level, box->z); trans->staging = &staging_depth->resource.b.b; } else if (use_staging_texture) { - resource.target = PIPE_TEXTURE_2D; + struct pipe_resource resource; + struct r600_resource_texture *staging; + + memset(&resource, 0, sizeof(resource)); resource.format = texture->format; resource.width0 = box->width; resource.height0 = box->height; resource.depth0 = 1; resource.array_size = 1; - resource.last_level = 0; - resource.nr_samples = 0; resource.usage = PIPE_USAGE_STAGING; - resource.bind = 0; resource.flags = R600_RESOURCE_FLAG_TRANSFER; - /* For texture reading, the temporary (detiled) texture is used as - * a render target when blitting from a tiled texture. */ - if (usage & PIPE_TRANSFER_READ) { - resource.bind |= PIPE_BIND_RENDER_TARGET; - } - /* For texture writing, the temporary texture is used as a sampler - * when blitting into a tiled texture. */ - if (usage & PIPE_TRANSFER_WRITE) { - resource.bind |= PIPE_BIND_SAMPLER_VIEW; + + /* We must set the correct texture target and dimensions if needed for a 3D transfer. */ + if (box->depth > 1 && u_max_layer(texture, level) > 0) + resource.target = texture->target; + else + resource.target = PIPE_TEXTURE_2D; + + switch (resource.target) { + case PIPE_TEXTURE_1D_ARRAY: + case PIPE_TEXTURE_2D_ARRAY: + case PIPE_TEXTURE_CUBE_ARRAY: + resource.array_size = box->depth; + break; + case PIPE_TEXTURE_3D: + resource.depth0 = box->depth; + break; + default:; } /* Create the temporary texture. */ - trans->staging = ctx->screen->resource_create(ctx->screen, &resource); - if (trans->staging == NULL) { + staging = (struct r600_resource_texture*)ctx->screen->resource_create(ctx->screen, &resource); + if (staging == NULL) { R600_ERR("failed to create temporary texture to hold untiled copy\n"); pipe_resource_reference(&trans->transfer.resource, NULL); FREE(trans); return NULL; } - trans->transfer.stride = ((struct r600_resource_texture *)trans->staging) - ->surface.level[0].pitch_bytes; + trans->staging = &staging->resource.b.b; + trans->transfer.stride = staging->surface.level[0].pitch_bytes; + trans->transfer.layer_stride = staging->surface.level[0].slice_size; if (usage & PIPE_TRANSFER_READ) { r600_copy_to_staging_texture(ctx, trans); /* Always referenced in the blit. */ @@ -346,7 +355,7 @@ static void *si_texture_transfer_map(struct pipe_context *ctx, if (trans->staging) { buf = si_resource(trans->staging)->cs_buf; } else { - buf = si_resource(trans->transfer.resource)->cs_buf; + buf = rtex->resource.cs_buf; } if (rtex->is_depth || !trans->staging) commit 8013101c2dceb4d249ad21ebcf21b26d95a2ca09 Author: Marek Olšák <mar...@gmail.com> Date: Tue Feb 19 17:43:08 2013 +0100 radeonsi: add assertions to prevent creation of invalid surfaces [ Cherry-picked from r600g commit ef11ed61a0414d0405c3faf7f48fa3f1d083f82e ] NOTE: This is a candidate for the 9.1 branch. Reviewed-by: Alex Deucher <alexander.deuc...@amd.com> (cherry picked from commit a84c4edeede12a1275a37a61408f578481bd4355) diff --git a/src/gallium/drivers/radeonsi/r600_blit.c b/src/gallium/drivers/radeonsi/r600_blit.c index 35c8f95..0b0eba3 100644 --- a/src/gallium/drivers/radeonsi/r600_blit.c +++ b/src/gallium/drivers/radeonsi/r600_blit.c @@ -98,21 +98,6 @@ static void r600_blitter_end(struct pipe_context *ctx) r600_context_queries_resume(rctx); } -static unsigned u_max_layer(struct pipe_resource *r, unsigned level) -{ - switch (r->target) { - case PIPE_TEXTURE_CUBE: - return 6 - 1; - case PIPE_TEXTURE_3D: - return u_minify(r->depth0, level) - 1; - case PIPE_TEXTURE_1D_ARRAY: - case PIPE_TEXTURE_2D_ARRAY: - return r->array_size - 1; - default: - return 0; - } -} - void si_blit_uncompress_depth(struct pipe_context *ctx, struct r600_resource_texture *texture, struct r600_resource_texture *staging, diff --git a/src/gallium/drivers/radeonsi/r600_texture.c b/src/gallium/drivers/radeonsi/r600_texture.c index 3165453..b7da5ac 100644 --- a/src/gallium/drivers/radeonsi/r600_texture.c +++ b/src/gallium/drivers/radeonsi/r600_texture.c @@ -546,6 +546,8 @@ static struct pipe_surface *r600_create_surface(struct pipe_context *pipe, struct r600_surface *surface = CALLOC_STRUCT(r600_surface); unsigned level = surf_tmpl->u.tex.level; + assert(surf_tmpl->u.tex.first_layer <= u_max_layer(texture, surf_tmpl->u.tex.level)); + assert(surf_tmpl->u.tex.last_layer <= u_max_layer(texture, surf_tmpl->u.tex.level)); assert(surf_tmpl->u.tex.first_layer == surf_tmpl->u.tex.last_layer); if (surface == NULL) return NULL; diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.h b/src/gallium/drivers/radeonsi/radeonsi_pipe.h index d0f04f4..8c6d908 100644 --- a/src/gallium/drivers/radeonsi/radeonsi_pipe.h +++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.h @@ -277,4 +277,20 @@ static INLINE uint64_t r600_resource_va(struct pipe_screen *screen, struct pipe_ return rscreen->ws->buffer_get_virtual_address(rresource->cs_buf); } +static INLINE unsigned u_max_layer(struct pipe_resource *r, unsigned level) +{ + switch (r->target) { + case PIPE_TEXTURE_CUBE: + return 6 - 1; + case PIPE_TEXTURE_3D: + return u_minify(r->depth0, level) - 1; + case PIPE_TEXTURE_1D_ARRAY: + case PIPE_TEXTURE_2D_ARRAY: + case PIPE_TEXTURE_CUBE_ARRAY: + return r->array_size - 1; + default: + return 0; + } +} + #endif commit 6894c127d912a5043196416865fbe9eff9f86903 Author: Marek Olšák <mar...@gmail.com> Date: Tue Feb 19 17:22:17 2013 +0100 radeonsi: use u_box_origin_2d helper function [ Cherry-picked from r600g commit b278aba42310e8fa30f2408b9dcd58dbb4901724 ] NOTE: This is a candidate for the 9.1 branch. Reviewed-by: Alex Deucher <alexander.deuc...@amd.com> (cherry picked from commit c4faab63c45aad579ef324fcc076c88a7cebbef6) diff --git a/src/gallium/drivers/radeonsi/r600_texture.c b/src/gallium/drivers/radeonsi/r600_texture.c index 3f75adb..3165453 100644 --- a/src/gallium/drivers/radeonsi/r600_texture.c +++ b/src/gallium/drivers/radeonsi/r600_texture.c @@ -55,11 +55,8 @@ static void r600_copy_from_staging_texture(struct pipe_context *ctx, struct r600 struct pipe_resource *texture = transfer->resource; struct pipe_box sbox; - sbox.x = sbox.y = sbox.z = 0; - sbox.width = transfer->box.width; - sbox.height = transfer->box.height; - /* XXX that might be wrong */ - sbox.depth = 1; + u_box_origin_2d(transfer->box.width, transfer->box.height, &sbox); + ctx->resource_copy_region(ctx, texture, transfer->level, transfer->box.x, transfer->box.y, transfer->box.z, rtransfer->staging, commit f0f3ebb7773e3def5cf81a476ec5d92d38b9c3e6 Author: Marek Olšák <mar...@gmail.com> Date: Thu Feb 14 12:48:12 2013 +0100 st/mesa: don't do sRGB conversion in CopyTexSubImage Assuming I understand EXT_texture_sRGB correctly. NOTE: This is a candidate for the stable branches. Reviewed-by: Brian Paul <bri...@vmware.com> (cherry picked from commit 6520a86c6755f52a1364fcd21dc36a5cb8381a0e) diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/state_tracker/st_cb_texture.c index 80a440d..c892d5a 100644 --- a/src/mesa/state_tracker/st_cb_texture.c +++ b/src/mesa/state_tracker/st_cb_texture.c @@ -1047,8 +1047,8 @@ st_CopyTexSubImage(struct gl_context *ctx, GLuint dims, assert(strb->surface); assert(stImage->pt); - src_format = strb->surface->format; - dest_format = stImage->pt->format; + src_format = util_format_linear(strb->surface->format); + dest_format = util_format_linear(stImage->pt->format); if (do_flip) { srcY1 = strb->Base.Height - srcY - height; commit deeb4b056f655465d26f02be1ea6b9042de88018 Author: Marek Olšák <mar...@gmail.com> Date: Thu Feb 21 16:53:32 2013 +0100 r600g: fix random corruption with CP DMA in TF2 NOTE: This is a candidate for the 9.1 branch. (cherry picked from commit aac81387447152b5bda99150414d636a003adc56) diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c index a89f230..44a9c82 100644 --- a/src/gallium/drivers/r600/r600_hw_context.c +++ b/src/gallium/drivers/r600/r600_hw_context.c @@ -1157,6 +1157,9 @@ void r600_cp_dma_copy_buffer(struct r600_context *rctx, src_offset += byte_count; dst_offset += byte_count; } + + /* Invalidate the read caches. */ + rctx->flags |= R600_CONTEXT_INVAL_READ_CACHES; } void r600_need_dma_space(struct r600_context *ctx, unsigned num_dw) commit 8818d01d3319a4e460c8bc444d0b4f451a73be2f Author: Andreas Boll <andreas.boll....@gmail.com> Date: Thu Feb 21 19:31:40 2013 +0100 llvmpipe/build: add DLOPEN_LIBS and PTHREAD_LIBS to the lp_test_* targets Fixes undefined symbols. NOTE: This is a candidate for the 9.1 branch. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61052 Tested-by: Vinson Lee <v...@freedesktop.org> Reviewed-by: Jose Fonseca <jfons...@vmware.com> (cherry picked from commit c1f2c3a80fa555287fd756832a05587fab8b79bd) diff --git a/src/gallium/drivers/llvmpipe/Makefile.am b/src/gallium/drivers/llvmpipe/Makefile.am index 78cb95d..f1ba5d1 100644 --- a/src/gallium/drivers/llvmpipe/Makefile.am +++ b/src/gallium/drivers/llvmpipe/Makefile.am @@ -85,23 +85,30 @@ check_PROGRAMS = \ lp_test_printf TESTS = $(check_PROGRAMS) +TEST_LIBS = \ + libllvmpipe.la \ + $(top_builddir)/src/gallium/auxiliary/libgallium.la \ + $(LLVM_LIBS) \ + $(DLOPEN_LIBS) \ + $(PTHREAD_LIBS) + -- To UNSUBSCRIBE, email to debian-x-requ...@lists.debian.org with a subject of "unsubscribe". Trouble? Contact listmas...@lists.debian.org Archive: http://lists.debian.org/e1u9ue9-0002qp...@vasks.debian.org