Makefile.am | 2
bin/.cherry-ignore | 6
bin/bugzilla_mesa.sh | 52 +
bin/get-pick-list.sh | 6
bin/shortlog_mesa.sh | 6
configure.ac | 2
debian/changelog | 71 -
debian/patches/revert-a64c1eb9b110.diff | 392 ---------
debian/patches/series | 2
docs/relnotes-9.1.2.html | 4
docs/relnotes-9.1.3.html | 228 +++++
include/pci_ids/r600_pci_ids.h | 2
include/pci_ids/radeonsi_pci_ids.h | 3
src/egl/drivers/dri2/egl_dri2.c | 6
src/egl/drivers/dri2/platform_x11.c | 21
src/gallium/auxiliary/gallivm/lp_bld_sample.c | 2
src/gallium/auxiliary/util/u_blitter.c | 113 ++
src/gallium/auxiliary/util/u_blitter.h | 18
src/gallium/drivers/nvc0/nvc0_video.c | 4
src/gallium/drivers/r600/r600_blit.c | 31
src/gallium/drivers/r600/r600_pipe.c | 39
src/gallium/drivers/r600/r600_pipe.h | 7
src/gallium/drivers/r600/r600_shader.c | 51 -
src/gallium/drivers/r600/r600_texture.c | 10
src/gallium/drivers/radeonsi/r600_blit.c | 18
src/gallium/include/state_tracker/st_api.h | 1
src/gallium/state_trackers/dri/common/dri_context.c | 2
src/gallium/state_trackers/dri/common/dri_screen.c | 3
src/gallium/winsys/sw/xlib/xlib_sw_winsys.c | 6
src/glsl/ast_to_hir.cpp | 15
src/glsl/ir_constant_expression.cpp | 2
src/glsl/link_varyings.cpp | 36
src/glsl/lower_jumps.cpp | 4
src/glsl/lower_packed_varyings.cpp | 8
src/glsl/ralloc.c | 2
src/glx/glxcmds.c | 4
src/mesa/drivers/dri/i965/brw_context.h | 26
src/mesa/drivers/dri/i965/brw_fs.cpp | 49 -
src/mesa/drivers/dri/i965/brw_fs.h | 3
src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 43 -
src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 1
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 14
src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp | 27
src/mesa/drivers/dri/i965/brw_misc_state.c | 195 ++--
src/mesa/drivers/dri/i965/brw_shader.cpp | 3
src/mesa/drivers/dri/i965/brw_state.h | 5
src/mesa/drivers/dri/i965/brw_vec4_emit.cpp | 4
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 10
src/mesa/drivers/dri/i965/brw_vs_surface_state.c | 7
src/mesa/drivers/dri/i965/brw_vtbl.c | 2
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 18
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 35
src/mesa/drivers/dri/i965/gen6_sol.c | 11
src/mesa/drivers/dri/i965/gen7_blorp.cpp | 103 ++
src/mesa/drivers/dri/i965/gen7_misc_state.c | 93 --
src/mesa/drivers/dri/i965/gen7_sol_state.c | 18
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 8
src/mesa/drivers/dri/intel/intel_context.h | 18
src/mesa/drivers/dri/intel/intel_fbo.c | 4
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 6
src/mesa/drivers/dri/intel/intel_tex.c | 4
src/mesa/main/context.c | 2
src/mesa/main/extensions.c | 4
src/mesa/main/format_unpack.c | 597 +++++++++++++-
src/mesa/main/get.c | 19
src/mesa/main/get_hash_params.py | 14
src/mesa/main/hash.c | 4
src/mesa/main/imports.h | 6
src/mesa/main/mtypes.h | 1
src/mesa/main/shaderapi.c | 6
src/mesa/main/stencil.c | 5
src/mesa/main/version.h | 4
src/mesa/program/prog_cache.c | 11
src/mesa/state_tracker/st_atom_constbuf.c | 1
src/mesa/state_tracker/st_atom_depth.c | 2
src/mesa/state_tracker/st_extensions.c | 3
src/mesa/swrast/s_blit.c | 49 -
77 files changed, 1823 insertions(+), 791 deletions(-)
New commits:
commit a6571e959278e6326bcbec6d4c8ecdb67b4ca6f8
Author: Maarten Lankhorst <maarten.lankho...@canonical.com>
Date: Thu May 23 10:06:40 2013 +0200
Release to saucy
* New upstream bug-fix release.
* Drop upstream patches:
- 0001-nv50-fix-3D-render-target-setup.patch
- 0002-nv50-nvc0-disable-DEPTH_RANGE_NEAR-FAR-clipping-duri.patch
- 0003-nv50-nvc0-fix-3d-blits-restore-viewport-after-blit.patch
- 0004-nvc0-fix-for-2d-engine-R-source-formats-writing-RRR1.patch
- 100_no_abi_tag.patch
- 119-libllvmradeon-link.patch
- vbo-fix-crash.diff
* debian/patches/117-static-gallium.patch: Refresh for minor change
in 9.1.2
diff --git a/debian/changelog b/debian/changelog
index 67feeb9..ab966cd 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,20 @@
+mesa (9.1.3-0ubuntu1) saucy; urgency=low
+
+ [ Robert Hooker ]
+ * New upstream bug-fix release.
+ * Drop upstream patches:
+ - 0001-nv50-fix-3D-render-target-setup.patch
+ - 0002-nv50-nvc0-disable-DEPTH_RANGE_NEAR-FAR-clipping-duri.patch
+ - 0003-nv50-nvc0-fix-3d-blits-restore-viewport-after-blit.patch
+ - 0004-nvc0-fix-for-2d-engine-R-source-formats-writing-RRR1.patch
+ - 100_no_abi_tag.patch
+ - 119-libllvmradeon-link.patch
+ - vbo-fix-crash.diff
+ * debian/patches/117-static-gallium.patch: Refresh for minor change
+ in 9.1.2
+
+ -- Maarten Lankhorst <maarten.lankho...@ubuntu.com> Thu, 23 May 2013
10:06:41 +0200
+
mesa (9.1.3-1) UNRELEASED; urgency=low
* New upstream release.
@@ -66,22 +83,6 @@ mesa (9.1.3-1) UNRELEASED; urgency=low
-- Julien Cristau <jcris...@debian.org> Fri, 03 Aug 2012 23:17:16 +0200
-mesa (9.1.2-0ubuntu1) UNRELEASED; urgency=low
-
- * New upstream bug-fix release.
- * Drop upstream patches:
- - 0001-nv50-fix-3D-render-target-setup.patch
- - 0002-nv50-nvc0-disable-DEPTH_RANGE_NEAR-FAR-clipping-duri.patch
- - 0003-nv50-nvc0-fix-3d-blits-restore-viewport-after-blit.patch
- - 0004-nvc0-fix-for-2d-engine-R-source-formats-writing-RRR1.patch
- - 100_no_abi_tag.patch
- - 119-libllvmradeon-link.patch
- - vbo-fix-crash.diff
- * debian/patches/117-static-gallium.patch: Refresh for minor change
- in 9.1.2
-
- -- Robert Hooker <sarv...@ubuntu.com> Wed, 01 May 2013 16:40:16 -0400
-
mesa (9.1.1-0ubuntu3) raring; urgency=low
* Hide x86sse symbols on i386, preventing conflicts. (LP: #1170074)
diff --git a/debian/patches/revert-a64c1eb9b110.diff
b/debian/patches/revert-a64c1eb9b110.diff
deleted file mode 100644
index 950157f..0000000
--- a/debian/patches/revert-a64c1eb9b110.diff
+++ /dev/null
@@ -1,392 +0,0 @@
---- a/src/mesa/drivers/dri/i965/brw_fs.cpp
-+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
-@@ -219,45 +219,6 @@ fs_visitor::CMP(fs_reg dst, fs_reg src0,
- return inst;
- }
-
--exec_list
--fs_visitor::VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index,
-- fs_reg offset)
--{
-- exec_list instructions;
-- fs_inst *inst;
--
-- if (intel->gen >= 7) {
-- inst = new(mem_ctx) fs_inst(FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7,
-- dst, surf_index, offset);
-- instructions.push_tail(inst);
-- } else {
-- int base_mrf = 13;
-- bool header_present = true;
--
-- fs_reg mrf = fs_reg(MRF, base_mrf + header_present);
-- mrf.type = BRW_REGISTER_TYPE_D;
--
-- /* On gen6+ we want the dword offset passed in, but on gen4/5 we need a
-- * dword-aligned byte offset.
-- */
-- if (intel->gen == 6) {
-- instructions.push_tail(MOV(mrf, offset));
-- } else {
-- instructions.push_tail(MUL(mrf, offset, fs_reg(4)));
-- }
-- inst = MOV(mrf, offset);
-- inst = new(mem_ctx) fs_inst(FS_OPCODE_VARYING_PULL_CONSTANT_LOAD,
-- dst, surf_index);
-- inst->header_present = header_present;
-- inst->base_mrf = base_mrf;
-- inst->mlen = header_present + dispatch_width / 8;
--
-- instructions.push_tail(inst);
-- }
--
-- return instructions;
--}
--
- /**
- * A helper for MOV generation for fixing up broken hardware SEND dependency
- * handling.
-@@ -443,7 +404,6 @@ fs_reg::equals(const fs_reg &r) const
- type == r.type &&
- negate == r.negate &&
- abs == r.abs &&
-- !reladdr && !r.reladdr &&
- memcmp(&fixed_hw_reg, &r.fixed_hw_reg,
- sizeof(fixed_hw_reg)) == 0 &&
- smear == r.smear &&
-@@ -1561,81 +1521,6 @@ fs_visitor::remove_dead_constants()
- return true;
- }
-
--/*
-- * Implements array access of uniforms by inserting a
-- * PULL_CONSTANT_LOAD instruction.
-- *
-- * Unlike temporary GRF array access (where we don't support it due to
-- * the difficulty of doing relative addressing on instruction
-- * destinations), we could potentially do array access of uniforms
-- * that were loaded in GRF space as push constants. In real-world
-- * usage we've seen, though, the arrays being used are always larger
-- * than we could load as push constants, so just always move all
-- * uniform array access out to a pull constant buffer.
-- */
--void
--fs_visitor::move_uniform_array_access_to_pull_constants()
--{
-- int pull_constant_loc[c->prog_data.nr_params];
--
-- for (unsigned int i = 0; i < c->prog_data.nr_params; i++) {
-- pull_constant_loc[i] = -1;
-- }
--
-- /* Walk through and find array access of uniforms. Put a copy of that
-- * uniform in the pull constant buffer.
-- *
-- * Note that we don't move constant-indexed accesses to arrays. No
-- * testing has been done of the performance impact of this choice.
-- */
-- foreach_list_safe(node, &this->instructions) {
-- fs_inst *inst = (fs_inst *)node;
--
-- for (int i = 0 ; i < 3; i++) {
-- if (inst->src[i].file != UNIFORM || !inst->src[i].reladdr)
-- continue;
--
-- int uniform = inst->src[i].reg;
--
-- /* If this array isn't already present in the pull constant buffer,
-- * add it.
-- */
-- if (pull_constant_loc[uniform] == -1) {
-- const float **values = &c->prog_data.param[uniform];
--
-- pull_constant_loc[uniform] = c->prog_data.nr_pull_params;
--
-- assert(param_size[uniform]);
--
-- for (int j = 0; j < param_size[uniform]; j++) {
-- c->prog_data.pull_param[c->prog_data.nr_pull_params++] =
-- values[j];
-- }
-- }
--
-- /* Set up the annotation tracking for new generated instructions. */
-- base_ir = inst->ir;
-- current_annotation = inst->annotation;
--
-- fs_reg offset = fs_reg(this, glsl_type::int_type);
-- inst->insert_before(ADD(offset, *inst->src[i].reladdr,
-- fs_reg(pull_constant_loc[uniform] +
-- inst->src[i].reg_offset)));
--
-- fs_reg surf_index = fs_reg((unsigned)SURF_INDEX_FRAG_CONST_BUFFER);
-- fs_reg temp = fs_reg(this, glsl_type::float_type);
-- exec_list list = VARYING_PULL_CONSTANT_LOAD(temp,
-- surf_index, offset);
-- inst->insert_before(&list);
--
-- inst->src[i].file = temp.file;
-- inst->src[i].reg = temp.reg;
-- inst->src[i].reg_offset = temp.reg_offset;
-- inst->src[i].reladdr = NULL;
-- }
-- }
--}
--
- /**
- * Choose accesses from the UNIFORM file to demote to using the pull
- * constant buffer.
-@@ -1662,31 +1547,8 @@ fs_visitor::setup_pull_constants()
- /* Just demote the end of the list. We could probably do better
- * here, demoting things that are rarely used in the program first.
- */
-- unsigned int pull_uniform_base = max_uniform_components;
--
-- int pull_constant_loc[c->prog_data.nr_params];
-- for (unsigned int i = 0; i < c->prog_data.nr_params; i++) {
-- if (i < pull_uniform_base) {
-- pull_constant_loc[i] = -1;
-- } else {
-- pull_constant_loc[i] = -1;
-- /* If our constant is already being uploaded for reladdr purposes,
-- * reuse it.
-- */
-- for (unsigned int j = 0; j < c->prog_data.nr_pull_params; j++) {
-- if (c->prog_data.pull_param[j] == c->prog_data.param[i]) {
-- pull_constant_loc[i] = j;
-- break;
-- }
-- }
-- if (pull_constant_loc[i] == -1) {
-- int pull_index = c->prog_data.nr_pull_params++;
-- c->prog_data.pull_param[pull_index] = c->prog_data.param[i];
-- pull_constant_loc[i] = pull_index;;
-- }
-- }
-- }
-- c->prog_data.nr_params = pull_uniform_base;
-+ int pull_uniform_base = max_uniform_components;
-+ int pull_uniform_count = c->prog_data.nr_params - pull_uniform_base;
-
- foreach_list(node, &this->instructions) {
- fs_inst *inst = (fs_inst *)node;
-@@ -1695,16 +1557,14 @@ fs_visitor::setup_pull_constants()
- if (inst->src[i].file != UNIFORM)
- continue;
-
-- int pull_index = pull_constant_loc[inst->src[i].reg +
-- inst->src[i].reg_offset];
-- if (pull_index == -1)
-+ int uniform_nr = inst->src[i].reg + inst->src[i].reg_offset;
-+ if (uniform_nr < pull_uniform_base)
- continue;
-
-- assert(!inst->src[i].reladdr);
--
- fs_reg dst = fs_reg(this, glsl_type::float_type);
- fs_reg index = fs_reg((unsigned)SURF_INDEX_FRAG_CONST_BUFFER);
-- fs_reg offset = fs_reg((unsigned)(pull_index * 4) & ~15);
-+ fs_reg offset = fs_reg((unsigned)(((uniform_nr -
-+ pull_uniform_base) * 4) & ~15));
- fs_inst *pull =
- new(mem_ctx) fs_inst(FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD,
- dst, index, offset);
-@@ -1716,9 +1576,15 @@ fs_visitor::setup_pull_constants()
- inst->src[i].file = GRF;
- inst->src[i].reg = dst.reg;
- inst->src[i].reg_offset = 0;
-- inst->src[i].smear = pull_index & 3;
-+ inst->src[i].smear = (uniform_nr - pull_uniform_base) & 3;
- }
- }
-+
-+ for (int i = 0; i < pull_uniform_count; i++) {
-+ c->prog_data.pull_param[i] = c->prog_data.param[pull_uniform_base + i];
-+ }
-+ c->prog_data.nr_params -= pull_uniform_count;
-+ c->prog_data.nr_pull_params = pull_uniform_count;
- }
-
- bool
-@@ -2633,7 +2499,6 @@ fs_visitor::get_instruction_generating_r
- end->predicate ||
- end->force_uncompressed ||
- end->force_sechalf ||
-- reg.reladdr ||
- !reg.equals(end->dst)) {
- return NULL;
- } else {
-@@ -2754,7 +2619,6 @@ fs_visitor::run()
-
- split_virtual_grfs();
-
-- move_uniform_array_access_to_pull_constants();
- setup_pull_constants();
-
- bool progress;
---- a/src/mesa/drivers/dri/i965/brw_fs.h
-+++ b/src/mesa/drivers/dri/i965/brw_fs.h
-@@ -121,8 +121,6 @@ public:
- uint32_t u;
- float f;
- } imm;
--
-- fs_reg *reladdr;
- };
-
- static const fs_reg reg_undef;
-@@ -256,7 +254,6 @@ public:
-
- fs_inst *emit(fs_inst inst);
- fs_inst *emit(fs_inst *inst);
-- void emit(exec_list list);
-
- fs_inst *emit(enum opcode opcode);
- fs_inst *emit(enum opcode opcode, fs_reg dst);
-@@ -292,8 +289,6 @@ public:
- fs_inst *end,
- fs_reg reg);
-
-- exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index,
-- fs_reg offset);
-
- bool run();
- void setup_payload_gen4();
-@@ -311,7 +306,6 @@ public:
- void spill_reg(int spill_reg);
- void split_virtual_grfs();
- void compact_virtual_grfs();
-- void move_uniform_array_access_to_pull_constants();
- void setup_pull_constants();
- void calculate_live_intervals();
- bool opt_algebraic();
-@@ -424,8 +418,6 @@ public:
- struct brw_wm_compile *c;
- unsigned int sanity_param_count;
-
-- int param_size[MAX_UNIFORMS * 4];
--
- int *virtual_grf_sizes;
- int virtual_grf_count;
- int virtual_grf_array_size;
---- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
-+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
-@@ -117,7 +117,6 @@ fs_visitor::visit(ir_variable *ir)
- return;
- }
-
-- param_size[param_index] = type_size(ir->type);
- if (!strncmp(ir->name, "gl_", 3)) {
- setup_builtin_uniform_values(ir);
- } else {
-@@ -161,41 +160,21 @@ fs_visitor::visit(ir_dereference_record
- void
- fs_visitor::visit(ir_dereference_array *ir)
- {
-- ir_constant *constant_index;
-- fs_reg src;
-- int element_size = type_size(ir->type);
--
-- constant_index = ir->array_index->as_constant();
-+ ir_constant *index;
-+ int element_size;
-
- ir->array->accept(this);
-- src = this->result;
-- src.type = brw_type_for_base_type(ir->type);
--
-- if (constant_index) {
-- assert(src.file == UNIFORM || src.file == GRF);
-- src.reg_offset += constant_index->value.i[0] * element_size;
-- } else {
-- /* Variable index array dereference. We attach the variable index
-- * component to the reg as a pointer to a register containing the
-- * offset. Currently only uniform arrays are supported in this patch,
-- * and that reladdr pointer is resolved by
-- * move_uniform_array_access_to_pull_constants(). All other array types
-- * are lowered by lower_variable_index_to_cond_assign().
-- */
-- ir->array_index->accept(this);
--
-- fs_reg index_reg;
-- index_reg = fs_reg(this, glsl_type::int_type);
-- emit(BRW_OPCODE_MUL, index_reg, this->result, fs_reg(element_size));
-+ index = ir->array_index->as_constant();
-
-- if (src.reladdr) {
-- emit(BRW_OPCODE_ADD, index_reg, *src.reladdr, index_reg);
-- }
-+ element_size = type_size(ir->type);
-+ this->result.type = brw_type_for_base_type(ir->type);
-
-- src.reladdr = ralloc(mem_ctx, fs_reg);
-- memcpy(src.reladdr, &index_reg, sizeof(index_reg));
-+ if (index) {
-+ assert(this->result.file == UNIFORM || this->result.file == GRF);
-+ this->result.reg_offset += index->value.i[0] * element_size;
-+ } else {
-+ assert(!"FINISHME: non-constant array element");
- }
-- this->result = src;
- }
-
- void
-@@ -620,21 +599,6 @@ fs_visitor::visit(ir_expression *ir)
- */
- assert(packed_consts.smear < 8);
- }
-- } else {
-- /* Turn the byte offset into a dword offset. */
-- fs_reg base_offset = fs_reg(this, glsl_type::int_type);
-- emit(SHR(base_offset, op[1], fs_reg(2)));
--
-- for (int i = 0; i < ir->type->vector_elements; i++) {
-- fs_reg offset = fs_reg(this, glsl_type::int_type);
-- emit(ADD(offset, base_offset, fs_reg(i)));
-- emit(VARYING_PULL_CONSTANT_LOAD(result, surf_index, offset));
--
-- if (ir->type->base_type == GLSL_TYPE_BOOL)
-- emit(CMP(result, result, fs_reg(0), BRW_CONDITIONAL_NZ));
--
-- result.reg_offset++;
-- }
- }
-
- result.reg_offset = 0;
-@@ -1884,16 +1848,6 @@ fs_visitor::emit(fs_inst *inst)
- return inst;
- }
-
--void
--fs_visitor::emit(exec_list list)
--{
-- foreach_list_safe(node, &list) {
-- fs_inst *inst = (fs_inst *)node;
-- inst->remove();
-- emit(inst);
-- }
--}
--
- /** Emits a dummy fragment shader consisting of magenta for bringup purposes.
*/
- void
- fs_visitor::emit_dummy_fs()
-@@ -2322,8 +2276,6 @@ fs_visitor::fs_visitor(struct brw_contex
-
- this->force_uncompressed_stack = 0;
- this->force_sechalf_stack = 0;
--
-- memset(&this->param_size, 0, sizeof(this->param_size));
- }
-
- fs_visitor::~fs_visitor()
---- a/src/mesa/drivers/dri/i965/brw_shader.cpp
-+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
-@@ -174,7 +174,7 @@ brw_link_shader(struct gl_context *ctx,
- bool input = true;
- bool output = stage == MESA_SHADER_FRAGMENT;
- bool temp = stage == MESA_SHADER_FRAGMENT;
-- bool uniform = false;
-+ bool uniform = stage == MESA_SHADER_FRAGMENT;
-
- bool lowered_variable_indexing =
- lower_variable_index_to_cond_assign(shader->ir,
diff --git a/debian/patches/series b/debian/patches/series
index b96e848..97a3cee 100644
--- a/debian/patches/series
+++ b/debian/patches/series
@@ -9,5 +9,3 @@
117-static-gallium.patch
118-dricore-gallium.patch
120-hide-x86sse.patch
-
-revert-a64c1eb9b110.diff
commit 1e1a0b1880565f246e875ccf2a71867a58e6e775
Author: Maarten Lankhorst <maarten.lankho...@canonical.com>
Date: Thu May 23 09:52:26 2013 +0200
bump changelog
diff --git a/debian/changelog b/debian/changelog
index 0e321c9..6aff50a 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,4 +1,4 @@
-mesa (9.1.2-1) UNRELEASED; urgency=low
+mesa (9.1.3-1) UNRELEASED; urgency=low
* New upstream release.
- Set close on exec flag when opening dri devices (Closes: #651370).
commit f32ec82a8cfcabc5b7596796f36afe7986651f02
Author: Ian Romanick <ian.d.roman...@intel.com>
Date: Tue May 21 12:59:17 2013 -0700
docs: 9.1.3 release notes
Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
diff --git a/docs/relnotes-9.1.3.html b/docs/relnotes-9.1.3.html
new file mode 100644
index 0000000..cff9370
--- /dev/null
+++ b/docs/relnotes-9.1.3.html
@@ -0,0 +1,228 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"
"http://www.w3.org/TR/html4/loose.dtd";>
+<html lang="en">
+<head>
+ <meta http-equiv="content-type" content="text/html; charset=utf-8">
+ <title>Mesa Release Notes</title>
+ <link rel="stylesheet" type="text/css" href="mesa.css">
+</head>
+<body>
+
+<div class="header">
+ <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 9.1.3 Release Notes / May 21st, 2013</h1>
+
+<p>
+Mesa 9.1.3 is a bug fix release which fixes bugs found since the 9.1.1 release.
+</p>
+<p>
+Mesa 9.1 implements the OpenGL 3.1 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.1. OpenGL
+3.1 is <strong>only</strong> available if requested at context creation
+because GL_ARB_compatibility is not supported.
+</p>
+
+<h2>MD5 checksums</h2>
+<pre>
+TBD
+</pre>
+
+<h2>New features</h2>
+<p>None.</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=39251";>Bug 39251</a>
- Second Life viewers from release 2.7.4.235167 to the last 3.4.0.264911 crash
on start.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=47478";>Bug 47478</a>
- [wine] GLX_DONT_CARE does not work for GLX_DRAWABLE_TYPE or
GLX_RENDER_TYPE</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=56416";>Bug 56416</a>
- [SNB bisected] SNB hang with rc6 and hiz on glxgears (and other GL apps)
immediately after xinit.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=57436";>Bug 57436</a>
- [GLSL1.40 IVB/HSW]Piglit
spec/glsl-1.40/compiler_built-in-functions/inverse-mat2.frag fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=61554";>Bug 61554</a>
- [ivb] Mesa 9.1 performance regression on KWin's Lanczos shader</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=61773";>Bug 61773</a>
- abort is an incredibly not-smart way to handle IR validation</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=62868";>Bug 62868</a>
- solaris build broken with missing ffsll</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=62999";>Bug 62999</a>
- glXChooseFBConfig with GLX_DRAWABLE_TYPE, GLX_DONT_CARE fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=63078";>Bug 63078</a>
- EGL X11 Regression: Maximum swap interval is 0 (worked with 9.0)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=63447";>Bug 63447</a>
- [i965 Bisected]Ogles1conform/Ogles2conform/Ogles3conform cases segfault</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=64662";>Bug 64662</a>
- [SNB 9.1 Bisected]Ogles2conform
GL2ExtensionTests/depth_texture_cube_map/depth_texture_cube_map.test fail</li>
+
+</ul>
+
+<h2>Changes</h2>
+<p>The full set of changes can be viewed by using the following GIT
command:</p>
+
+<pre>
+ git log mesa-9.1.2..mesa-9.1.3
+</pre>
+
+<p>Alex Deucher (2):</p>
+<ul>
+ <li>r600g: add new richland pci ids</li>
+ <li>radeonsi: add new SI pci ids</li>
+</ul>
+
+<p>Alexander Monakov (1):</p>
+<ul>
+ <li>Honor GLX_DONT_CARE in MATCH_MASK</li>
+</ul>
+
+<p>Andreas Boll (2):</p>
+<ul>
+ <li>mesa: Add a script to generate the list of fixed bugs</li>
+ <li>mesa: add usage examples to get-pick-list and shortlog scripts</li>
+</ul>
+
+<p>Aras Pranckevicius (1):</p>
+<ul>
+ <li>GLSL: fix lower_jumps to report progress properly</li>
+</ul>
+
+<p>Brian Paul (3):</p>
+<ul>
+ <li>mesa: remove platform checks around __builtin_ffs, __builtin_ffsll</li>
+ <li>gallium/u_blitter: fix is_blit_generic_supported() stencil checking</li>
+ <li>mesa: enable GL_ARB_texture_float if TEXTURE_FLOAT_ENABLED is
defined</li>
+</ul>
+
+<p>Chad Versace (2):</p>
+<ul>
+ <li>egl/dri2: Fix min/max swap interval of configs</li>
+ <li>intel: Allocate hiz in intel_renderbuffer_move_to_temp()</li>
+</ul>
+
+<p>Chris Forbes (2):</p>
+<ul>
+ <li>i965/fs: Don't try to use bogus interpolation modes pre-Gen6.</li>
+ <li>mesa: don't memcmp() off the end of a cache key.</li>
+</ul>
+
+<p>Dave Airlie (2):</p>
+<ul>
+ <li>st/mesa: fix UBO offsets.</li>
+ <li>ralloc: don't write to memory in case of alloc fail.</li>
+</ul>
+
+<p>Eric Anholt (11):</p>
+<ul>
+ <li>i965/fs: Remove creation of a MOV instruction that's never used.</li>
+ <li>i965/fs: Move varying uniform offset compuation into the helper
func.</li>
+ <li>i965: Make the constant surface interface take a normal byte size.</li>
+ <li>i965/fs: Avoid inappropriate optimization with regs_written > 1.</li>
+ <li>i965/fs: Do CSE on gen7's varying-index pull constant loads.</li>
+ <li>i965/fs: Clean up the setup of gen4 simd16 message destinations.</li>
+ <li>i965/gen7: Skip resetting SOL offsets at batch start with HW
contexts.</li>
+ <li>i965/gen6: Reduce updates of transform feedback offsets with HW
contexts.</li>
+ <li>i965: Fix SNB GPU hangs when a blorp batch is the first thing to
execute.</li>
+ <li>i965: Fix hangs on HSW since the gen6 blorp fix.</li>
+ <li>i965: Disable write masking when setting up texturing m0.</li>
+</ul>
+
+<p>Haixia Shi (1):</p>
+<ul>
+ <li>ACTIVE_UNIFORM_MAX_LENGTH should include 3 extra characters for
arrays.</li>
+</ul>
+
+<p>Ian Romanick (11):</p>
+<ul>
+ <li>docs: Add 9.1.2 release md5sums</li>
+ <li>mesa: Note that patch 0967c36 shouldn't actually get picked to the 9.1
branch</li>
+ <li>mesa: NULL check the pointer before trying to dereference it</li>
+ <li>egl/dri2: NULL check value returned by dri2_create_surface</li>
+ <li>mesa: Don't leak shared state when context initialization fails</li>
+ <li>mesa: Don't leak gl_context::BeginEnd at context destruction</li>
+ <li>mesa/swrast: Refactor no-memory error checking in blit_linear</li>
+ <li>mesa/swrast: Move free calls outside the attachment loop</li>
+ <li>intel: Don't dereference a NULL pointer of calloc fails</li>
+ <li>mesa: Note that a824692 is already back ported</li>
+ <li>mesa: Bump version to 9.1.3</li>
+</ul>
+
+<p>José Fonseca (1):</p>
+<ul>
+ <li>winsys/sw/xlib: Prevent shared memory segment leakage.</li>
+</ul>
+
+<p>Kenneth Graunke (9):</p>
+<ul>
+ <li>mesa: Add new ctx->Stencil._WriteEnabled derived state flag.</li>
+ <li>i965: Fix stencil write enable flag in 3DSTATE_DEPTH_BUFFER on
Gen7+.</li>
+ <li>mesa: Fix unpack function for ETC2_SRGB8_PUNCHTHROUGH_ALPHA1.</li>
+ <li>mesa: Add an unpack function for ARGB2101010_UINT.</li>
+ <li>mesa: Add unpack functions for R/RG/RGB [U]INT8/16/32 formats.</li>
+ <li>mesa: Add unpack functions for A/I/L/LA [U]INT8/16/32 formats.</li>
+ <li>glsl: Ignore redundant prototypes after a function's been defined.</li>
+ <li>i965: Lower textureGrad() for samplerCubeShadow.</li>
+ <li>i965/vs: Fix textureGrad() with shadow samplers on Haswell.</li>
+</ul>
+
+<p>Maarten Lankhorst (1):</p>
+<ul>
+ <li>nvc0: Fix fd leak in nvc0_create_decoder</li>
+</ul>
+
+<p>Marek Olšák (5):</p>
+<ul>
+ <li>radeonsi: add more cases for copying unsupported formats to
resource_copy_region</li>
+ <li>mesa: fix glGet queries depending on derived framebuffer state (v2)</li>
+ <li>gallium/u_blitter: implement buffer clearing</li>
+ <li>r600g: initialize CMASK and HTILE with the GPU using streamout</li>
+ <li>st/mesa: depth-stencil-alpha state also depends on _NEW_BUFFERS</li>
+</ul>
+
+<p>Martin Andersson (1):</p>
+<ul>
+ <li>r600g: Fix UMAD on Cayman</li>
+</ul>
+
+<p>Michel Dänzer (1):</p>
+<ul>
+ <li>radeonsi: Handle arbitrary 2-byte formats in resource_copy_region</li>
+</ul>
+
+<p>Paul Berry (7):</p>
+<ul>
+ <li>glsl: Fix array indexing when constant folding built-in functions.</li>
+ <li>i965: Reduce code duplication in handling of depth, stencil, and
HiZ.</li>
+ <li>glsl/linker: fix varying packing for non-flat integer varyings.</li>
+ <li>glsl: Document lower_packed_varyings' "flat" requirement with an
assert.</li>
+ <li>glsl/linker: Adapt flat varying handling in preparation for geometry
shaders.</li>
+ <li>glsl/linker: Reduce scope of non-flat integer varying fix.</li>
+ <li>intel: Do a depth resolve before copying images between miptrees.</li>
+</ul>
+
+<p>Ralf Jung (1):</p>
+<ul>
+ <li>egl/x11: Fix initialisation of swap_interval</li>
+</ul>
+
+<p>Roland Scheidegger (1):</p>
+<ul>
+ <li>gallivm: fix small but severe bug in handling multiple lod level
strides</li>
+</ul>
+
+<p>Vadim Girlin (1):</p>
+<ul>
+ <li>gallium: handle drirc disable_glsl_line_continuations option</li>
+</ul>
+
+</div>
+</body>
+</html>
commit e9be1f7ce5d7f24e68ed63136cdfd8b3c1899065
Author: Ian Romanick <ian.d.roman...@intel.com>
Date: Tue May 21 12:49:28 2013 -0700
mesa: Bump version to 9.1.3
Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
diff --git a/Makefile.am b/Makefile.am
index 558b965..0c398cb 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -36,7 +36,7 @@ check-local:
# Rules for making release tarballs
-PACKAGE_VERSION=9.1.2
+PACKAGE_VERSION=9.1.3
PACKAGE_DIR = Mesa-$(PACKAGE_VERSION)
PACKAGE_NAME = MesaLib-$(PACKAGE_VERSION)
diff --git a/configure.ac b/configure.ac
index b9fcb0b..36065f1 100644
--- a/configure.ac
+++ b/configure.ac
@@ -6,7 +6,7 @@ dnl Tell the user about autoconf.html in the --help output
m4_divert_once([HELP_END], [
See docs/autoconf.html for more details on the options for Mesa.])
-AC_INIT([Mesa], [9.1.2],
+AC_INIT([Mesa], [9.1.3],
[https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa])
AC_CONFIG_AUX_DIR([bin])
AC_CONFIG_MACRO_DIR([m4])
diff --git a/src/mesa/main/version.h b/src/mesa/main/version.h
index c22f2c8..12e7409 100644
--- a/src/mesa/main/version.h
+++ b/src/mesa/main/version.h
@@ -34,8 +34,8 @@ struct gl_context;
/* Mesa version */
#define MESA_MAJOR 9
#define MESA_MINOR 1
-#define MESA_PATCH 2
-#define MESA_VERSION_STRING "9.1.2"
+#define MESA_PATCH 3
+#define MESA_VERSION_STRING "9.1.3"
/* To make version comparison easy */
#define MESA_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))
commit caeab4d170229ec85cf5d3e79ce7f7e2c9cabf44
Author: Ian Romanick <ian.d.roman...@intel.com>
Date: Tue May 21 12:47:32 2013 -0700
mesa: Note that a824692 is already back ported
Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
diff --git a/bin/.cherry-ignore b/bin/.cherry-ignore
index 32393f3..2a5fae2 100644
--- a/bin/.cherry-ignore
+++ b/bin/.cherry-ignore
@@ -11,3 +11,6 @@ dbf94d105a48b7aafb2c8cf64d8b4392d87efea1 glsl: Replace
constant-index vector arr
# This patch is superceded by 34a4fc5
0967c362bf378b7415c30ca6d9523d3b2a3a7f5d i965: Fix an inconsistency inb the
VUE map with gl_ClipVertex on gen4/5.
+
+# This patch was backported as c3eb301
+a8246927e35a49097f70cffb7fa8dd05ec1365e1 r600g: Fix UMAD on Cayman
commit cbe0e50247c909a7d34f71d9a1a4852b6c3af472
Author: Paul Berry <stereotype...@gmail.com>
Date: Thu May 16 14:12:15 2013 -0700
intel: Do a depth resolve before copying images between miptrees.
When intel_finalize_mipmap_tree() calls intel_miptree_copy_teximage()
to reassemble a depth miptree that has been broken apart into pieces
(to deal with misalignment of levels/layers within the miptree), it
just copies the depth data, not the HiZ data. This is reasonable,
since the alignment restrictions of HiZ are a large part of the reason
why the miptree had to be broken apart in the first place. However,
in order for the depth copy to be sufficient, we need to do a depth
resolve first, to make sure any deferred depth writes that are in the
HiZ buffer get performed.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=64662 and
https://bugs.freedesktop.org/show_bug.cgi?id=64659.
NOTE: This is a candidate for stable release branches.
Reviewed-by: Chad Versace <chad.vers...@linux.intel.com>
(cherry picked from commit 46ea8041074df79561f9771e2ecf198f2cbd088f)
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index a063f87..43f3779 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -725,6 +725,12 @@ intel_miptree_copy_slice(struct intel_context *intel,
dst_mt, dst_x, dst_y, dst_mt->region->pitch,
width, height);
+ /* Since we are about to copy depth data using either the blitter or swrast
+ * (neither of which respect HiZ), we need to do a depth resolve first.
+ */
+ intel_miptree_slice_resolve_depth(intel, src_mt, level, slice);
+ intel_miptree_slice_resolve_depth(intel, dst_mt, level, slice);
+
if (!intelEmitCopyBlit(intel,
dst_mt->region->cpp,
src_mt->region->pitch, src_mt->region->bo,
commit c3eb301a3a09f4b1b471afdbd16a4f986702f194
Author: Martin Andersson <g02ma...@gmail.com>
Date: Tue Apr 2 22:43:33 2013 +0200
r600g: Fix UMAD on Cayman
The multiplication part of tgsi_umad did not work on Cayman, because it did
not populate the correct vector slots.
This fixed hardlocks in the EXT_transform_feedback/order tests.
NOTE: This is a candidate for the stable branches.
(might not be easy to cherry-pick though)
Signed-off-by: Marek Olšák <mar...@gmail.com>
Stable backport:
Signed-off-by: Dave Airlie <airl...@redhat.com>
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index e8992ba..e0fb18b 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -5760,7 +5760,7 @@ static int tgsi_umad(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
&ctx->parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
- int i, j, r;
+ int i, j, k, r;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
/* src0 * src1 */
@@ -5768,21 +5768,40 @@ static int tgsi_umad(struct r600_shader_ctx *ctx)
if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
continue;
- memset(&alu, 0, sizeof(struct r600_bytecode_alu));
-
- alu.dst.chan = i;
- alu.dst.sel = ctx->temp_reg;
- alu.dst.write = 1;
-
- alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT);
- for (j = 0; j < 2; j++) {
- r600_bytecode_src(&alu.src[j], &ctx->src[j], i);
- }
-
- alu.last = 1;
- r = r600_bytecode_add_alu(ctx->bc, &alu);
- if (r)
- return r;
+ if (ctx->bc->chip_class == CAYMAN) {
+ for (j = 0; j < 4; j++) {
+ memset(&alu, 0, sizeof(struct
r600_bytecode_alu));
+ alu.dst.chan = j;
+ alu.dst.sel = ctx->temp_reg;
+ alu.dst.write = (j == i);
+
+ if (j == 3)
+ alu.last = 1;
+ alu.inst =
CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT);
+ for (k = 0; k < inst->Instruction.NumSrcRegs;
k++) {
+ r600_bytecode_src(&alu.src[k],
&ctx->src[k], i);
+ }
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
+ } else {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+
+ alu.dst.chan = i;
+ alu.dst.sel = ctx->temp_reg;
+ alu.dst.write = 1;
--
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