debian/changelog |
10
debian/patches/add-chipset-limits-for-the-haswell-gt3-variant.diff |
29 ++
debian/patches/series |
5
debian/patches/turn-brw-urb-vs-size-and-gs-size-into-local-variables.diff |
110 ++++++++++
debian/patches/update-urb-partitioning-code-for-haswell-gt3-variant.diff |
78 +++++++
debian/patches/use-a-variable-for-the-push-constant-size-in-kb.diff |
38 +++
6 files changed, 270 insertions(+)
New commits:
commit a29f5184f2c1ab698915f8f82b5d5b5d169aec9f
Author: Timo Aaltonen <tjaal...@ubuntu.com>
Date: Wed Jul 3 11:15:09 2013 +0300
Added patches to fix a GPU hang with GT3 (LP: #1197316)
* Added patches to fix a GPU hang with GT3
- add-chipset-limits-for-the-haswell-gt3-variant.diff
- turn-brw-urb-vs-size-and-gs-size-into-local-variables.diff
- update-urb-partitioning-code-for-haswell-gt3-variant.diff
- use-a-variable-for-the-push-constant-size-in-kb.diff
diff --git a/debian/changelog b/debian/changelog
index a379833..5d9d8f7 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,13 @@
+mesa (9.0.3-0ubuntu0.4) quantal-proposed; urgency=low
+
+ * Added patches to fix a GPU hang with GT3 (LP: #1197316)
+ - add-chipset-limits-for-the-haswell-gt3-variant.diff
+ - turn-brw-urb-vs-size-and-gs-size-into-local-variables.diff
+ - update-urb-partitioning-code-for-haswell-gt3-variant.diff
+ - use-a-variable-for-the-push-constant-size-in-kb.diff
+
+ -- Timo Aaltonen <tjaal...@ubuntu.com> Wed, 03 Jul 2013 11:03:21 +0300
+
mesa (9.0.3-0ubuntu0.3) quantal-proposed; urgency=low
* Added patches to add/fix Haswell pci-id's (LP: #1175533)
diff --git a/debian/patches/add-chipset-limits-for-the-haswell-gt3-variant.diff
b/debian/patches/add-chipset-limits-for-the-haswell-gt3-variant.diff
new file mode 100644
index 0000000..46c328f
--- /dev/null
+++ b/debian/patches/add-chipset-limits-for-the-haswell-gt3-variant.diff
@@ -0,0 +1,29 @@
+commit ed7fa63bbd375aaf6f1ed179ecd7b74f3a752c64
+Author: Kenneth Graunke <kenn...@whitecape.org>
+Date: Wed Mar 7 09:58:15 2012 -0800
+
+ i965: Add chipset limits for the Haswell GT3 variant.
+
+ NOTE: This is a candidate for stable branches.
+
+ Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
+ Signed-off-by: Eugeni Dodonov <eugeni.dodo...@intel.com>
+ (cherry picked from commit d0b82b1add5d1d1419d4390a3f7c584b6ee7d92c)
+
+diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
+index 19497e9..0b69b53 100644
+--- a/src/mesa/drivers/dri/i965/brw_context.c
++++ b/src/mesa/drivers/dri/i965/brw_context.c
+@@ -293,6 +293,12 @@ brwCreateContext(int api,
+ brw->urb.size = 256;
+ brw->urb.max_vs_entries = 1664;
+ brw->urb.max_gs_entries = 640;
++ } else if (intel->gt == 3) {
++ brw->max_wm_threads = 408;
++ brw->max_vs_threads = 280;
++ brw->urb.size = 512;
++ brw->urb.max_vs_entries = 1664;
++ brw->urb.max_gs_entries = 640;
+ }
+ } else if (intel->gen == 7) {
+ if (intel->gt == 1) {
diff --git a/debian/patches/series b/debian/patches/series
index a5ef829..f0a2b0b 100644
--- a/debian/patches/series
+++ b/debian/patches/series
@@ -24,3 +24,8 @@ add-vlv-ids.diff
fix-hsw-gt3-names.diff
fix-missing-gt3-id.diff
add-more-reserved-hsw-ids.diff
+
+turn-brw-urb-vs-size-and-gs-size-into-local-variables.diff
+use-a-variable-for-the-push-constant-size-in-kb.diff
+update-urb-partitioning-code-for-haswell-gt3-variant.diff
+add-chipset-limits-for-the-haswell-gt3-variant.diff
diff --git
a/debian/patches/turn-brw-urb-vs-size-and-gs-size-into-local-variables.diff
b/debian/patches/turn-brw-urb-vs-size-and-gs-size-into-local-variables.diff
new file mode 100644
index 0000000..e010507
--- /dev/null
+++ b/debian/patches/turn-brw-urb-vs-size-and-gs-size-into-local-variables.diff
@@ -0,0 +1,110 @@
+commit 210f2794f5c4fedc7400d810af43b46d8e2dff84
+Author: Kenneth Graunke <kenn...@whitecape.org>
+Date: Tue Apr 2 21:11:50 2013 -0700
+
+ i965: Turn brw->urb.vs_size and gs_size into local variables.
+
+ These variables are only used within a single function, so we may as
+ well make them local variables.
+
+ Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
+ Reviewed-by: Paul Berry <stereotype...@gmail.com>
+ (cherry picked from commit 8cdb2d32ecd636a6d68840a68504c1fe1b14426b)
+
+diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
+index d718c15..910b73b 100644
+--- a/src/mesa/drivers/dri/i965/brw_context.h
++++ b/src/mesa/drivers/dri/i965/brw_context.h
+@@ -844,15 +844,6 @@ struct brw_context
+ GLuint nr_sf_entries;
+ GLuint nr_cs_entries;
+
+- /* gen6:
+- * The length of each URB entry owned by the VS (or GS), as
+- * a number of 1024-bit (128-byte) rows. Should be >= 1.
+- *
+- * gen7: Same meaning, but in 512-bit (64-byte) rows.
+- */
+- GLuint vs_size;
+- GLuint gs_size;
+-
+ GLuint vs_start;
+ GLuint gs_start;
+ GLuint clip_start;
+diff --git a/src/mesa/drivers/dri/i965/gen6_urb.c
b/src/mesa/drivers/dri/i965/gen6_urb.c
+index 2d69cbe..aa985de 100644
+--- a/src/mesa/drivers/dri/i965/gen6_urb.c
++++ b/src/mesa/drivers/dri/i965/gen6_urb.c
+@@ -54,7 +54,7 @@ gen6_upload_urb( struct brw_context *brw )
+ int total_urb_size = brw->urb.size * 1024; /* in bytes */
+
+ /* CACHE_NEW_VS_PROG */
+- brw->urb.vs_size = MAX2(brw->vs.prog_data->urb_entry_size, 1);
++ unsigned vs_size = MAX2(brw->vs.prog_data->urb_entry_size, 1);
+
+ /* We use the same VUE layout for VS outputs and GS outputs (as it's what
+ * the SF and Clipper expect), so we can simply make the GS URB entry size
+@@ -62,14 +62,14 @@ gen6_upload_urb( struct brw_context *brw )
+ * where we have few vertex attributes and a lot of varyings, since the VS
+ * size is determined by the larger of the two. For now, it's safe.
+ */
+- brw->urb.gs_size = brw->urb.vs_size;
++ unsigned gs_size = vs_size;
+
+ /* Calculate how many entries fit in each stage's section of the URB */
+ if (brw->gs.prog_active) {
+- nr_vs_entries = (total_urb_size/2) / (brw->urb.vs_size * 128);
+- nr_gs_entries = (total_urb_size/2) / (brw->urb.gs_size * 128);
++ nr_vs_entries = (total_urb_size/2) / (vs_size * 128);
++ nr_gs_entries = (total_urb_size/2) / (gs_size * 128);
+ } else {
+- nr_vs_entries = total_urb_size / (brw->urb.vs_size * 128);
++ nr_vs_entries = total_urb_size / (vs_size * 128);
+ nr_gs_entries = 0;
+ }
+
+@@ -87,14 +87,14 @@ gen6_upload_urb( struct brw_context *brw )
+ assert(brw->urb.nr_vs_entries >= 24);
+ assert(brw->urb.nr_vs_entries % 4 == 0);
+ assert(brw->urb.nr_gs_entries % 4 == 0);
+- assert(brw->urb.vs_size < 5);
+- assert(brw->urb.gs_size < 5);
++ assert(vs_size < 5);
++ assert(gs_size < 5);
+
+ BEGIN_BATCH(3);
+ OUT_BATCH(_3DSTATE_URB << 16 | (3 - 2));
+- OUT_BATCH(((brw->urb.vs_size - 1) << GEN6_URB_VS_SIZE_SHIFT) |
++ OUT_BATCH(((vs_size - 1) << GEN6_URB_VS_SIZE_SHIFT) |
+ ((brw->urb.nr_vs_entries) << GEN6_URB_VS_ENTRIES_SHIFT));
+- OUT_BATCH(((brw->urb.gs_size - 1) << GEN6_URB_GS_SIZE_SHIFT) |
++ OUT_BATCH(((gs_size - 1) << GEN6_URB_GS_SIZE_SHIFT) |
+ ((brw->urb.nr_gs_entries) << GEN6_URB_GS_ENTRIES_SHIFT));
+ ADVANCE_BATCH();
+
+diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c
b/src/mesa/drivers/dri/i965/gen7_urb.c
+index 481497b..dafe1ad 100644
+--- a/src/mesa/drivers/dri/i965/gen7_urb.c
++++ b/src/mesa/drivers/dri/i965/gen7_urb.c
+@@ -82,9 +82,9 @@ gen7_upload_urb(struct brw_context *brw)
+ int handle_region_size = (brw->urb.size - 16) * 1024; /* bytes */
+
+ /* CACHE_NEW_VS_PROG */
+- brw->urb.vs_size = MAX2(brw->vs.prog_data->urb_entry_size, 1);
++ unsigned vs_size = MAX2(brw->vs.prog_data->urb_entry_size, 1);
+
+- int nr_vs_entries = handle_region_size / (brw->urb.vs_size * 64);
++ int nr_vs_entries = handle_region_size / (vs_size * 64);
+ if (nr_vs_entries > brw->urb.max_vs_entries)
+ nr_vs_entries = brw->urb.max_vs_entries;
+
+@@ -100,8 +100,7 @@ gen7_upload_urb(struct brw_context *brw)
+ assert(!brw->gs.prog_active);
+
+ gen7_emit_vs_workaround_flush(intel);
+- gen7_emit_urb_state(brw, brw->urb.nr_vs_entries, brw->urb.vs_size,
+- brw->urb.vs_start);
++ gen7_emit_urb_state(brw, brw->urb.nr_vs_entries, vs_size,
brw->urb.vs_start);
+ }
+
+ void
diff --git
a/debian/patches/update-urb-partitioning-code-for-haswell-gt3-variant.diff
b/debian/patches/update-urb-partitioning-code-for-haswell-gt3-variant.diff
new file mode 100644
index 0000000..9c8446a
--- /dev/null
+++ b/debian/patches/update-urb-partitioning-code-for-haswell-gt3-variant.diff
@@ -0,0 +1,78 @@
+commit acff9c2bbf6cf4d9aa270cf7ea04b40f29eb60ec
+Author: Kenneth Graunke <kenn...@whitecape.org>
+Date: Sat Sep 24 00:12:58 2011 -0700
+
+ i965: Update URB partitioning code for Haswell's GT3 variant.
+
+ Haswell's GT3 variant offers 32kB of URB space for push constants, while
+ GT1 and GT2 match Ivybridge, providing 16kB. Update the code to reserve
+ the full 32kB on GT3.
+
+ v2: Specify push constant size correctly. I thought GT3 reinterpreted
+ the value as multiples of 2kB, but it doesn't. You simply have to
+ program an even number.
+
+ NOTE: This is a candidate for stable branches.
+
+ Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
+ (cherry picked from commit eca2251f42f0234584d94268c29bddede3ff6451)
+
+diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c
b/src/mesa/drivers/dri/i965/gen7_urb.c
+index 5ac3885..e92e211 100644
+--- a/src/mesa/drivers/dri/i965/gen7_urb.c
++++ b/src/mesa/drivers/dri/i965/gen7_urb.c
+@@ -39,29 +39,37 @@
+ * +-------------------------------------------------------------+
+ *
+ * Notably, push constants must be stored at the beginning of the URB
+- * space, while entries can be stored anywhere. Ivybridge has a maximum
+- * constant buffer size of 16kB.
++ * space, while entries can be stored anywhere. Ivybridge and Haswell
++ * GT1/GT2 have a maximum constant buffer size of 16kB, while Haswell GT3
++ * doubles this (32kB).
+ *
+ * Currently we split the constant buffer space evenly between VS and FS.
+ * This is probably not ideal, but simple.
+ *
+- * Ivybridge GT1 has 128kB of URB space.
+- * Ivybridge GT2 has 256kB of URB space.
++ * Ivybridge GT1 and Haswell GT1 have 128kB of URB space.
++ * Ivybridge GT2 and Haswell GT2 have 256kB of URB space.
++ * Haswell GT3 has 512kB of URB space.
+ *
+- * See "Volume 2a: 3D Pipeline," section 1.8.
++ * See "Volume 2a: 3D Pipeline," section 1.8, "Volume 1b: Configurations",
++ * and the documentation for 3DSTATE_PUSH_CONSTANT_ALLOC_xS.
+ */
+ void
+ gen7_allocate_push_constants(struct brw_context *brw)
+ {
+ struct intel_context *intel = &brw->intel;
++
++ unsigned size = 8;
++ if (intel->is_haswell && intel->gt == 3)
++ size = 16;
++
+ BEGIN_BATCH(2);
+ OUT_BATCH(_3DSTATE_PUSH_CONSTANT_ALLOC_VS << 16 | (2 - 2));
+- OUT_BATCH(8);
++ OUT_BATCH(size);
+ ADVANCE_BATCH();
+
+ BEGIN_BATCH(2);
+ OUT_BATCH(_3DSTATE_PUSH_CONSTANT_ALLOC_PS << 16 | (2 - 2));
+- OUT_BATCH(8 | 8 << GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT);
++ OUT_BATCH(size | size << GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT);
+ ADVANCE_BATCH();
+ }
+
+@@ -78,7 +86,8 @@ static void
+ gen7_upload_urb(struct brw_context *brw)
+ {
+ struct intel_context *intel = &brw->intel;
+- const int push_size_kB = 16;
++ const int push_size_kB = intel->is_haswell && intel->gt == 3 ? 32 : 16;
++
+ /* Total space for entries is URB size - 16kB for push constants */
+ int handle_region_size = (brw->urb.size - push_size_kB) * 1024; /* bytes */
+
diff --git
a/debian/patches/use-a-variable-for-the-push-constant-size-in-kb.diff
b/debian/patches/use-a-variable-for-the-push-constant-size-in-kb.diff
new file mode 100644
index 0000000..aaf03d4
--- /dev/null
+++ b/debian/patches/use-a-variable-for-the-push-constant-size-in-kb.diff
@@ -0,0 +1,38 @@
+commit d4311138e47224acea21f5ecde74a9ea2aee994f
+Author: Kenneth Graunke <kenn...@whitecape.org>
+Date: Tue Apr 2 21:11:51 2013 -0700
+
+ i965: Use a variable for the push constant size in kB.
+
+ This clarifies that the offset of 2 is actually 16 kB / 8kB units.
+ It also keys both computations off of a single variable, which should
+ make it easier to change in the future.
+
+ Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
+ Reviewed-by: Paul Berry <stereotype...@gmail.com>
+ (cherry picked from commit 967514ce680f7bf785ab544c6174786dd20425de)
+
+diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c
b/src/mesa/drivers/dri/i965/gen7_urb.c
+index dafe1ad..5ac3885 100644
+--- a/src/mesa/drivers/dri/i965/gen7_urb.c
++++ b/src/mesa/drivers/dri/i965/gen7_urb.c
+@@ -78,8 +78,9 @@ static void
+ gen7_upload_urb(struct brw_context *brw)
+ {
+ struct intel_context *intel = &brw->intel;
++ const int push_size_kB = 16;
+ /* Total space for entries is URB size - 16kB for push constants */
+- int handle_region_size = (brw->urb.size - 16) * 1024; /* bytes */
++ int handle_region_size = (brw->urb.size - push_size_kB) * 1024; /* bytes */
+
+ /* CACHE_NEW_VS_PROG */
+ unsigned vs_size = MAX2(brw->vs.prog_data->urb_entry_size, 1);
+@@ -92,7 +93,7 @@ gen7_upload_urb(struct brw_context *brw)
+ brw->urb.nr_vs_entries = ROUND_DOWN_TO(nr_vs_entries, 8);
+
+ /* URB Starting Addresses are specified in multiples of 8kB. */
+- brw->urb.vs_start = 2; /* skip over push constants */
++ brw->urb.vs_start = push_size_kB / 8; /* skip over push constants */
+
+ assert(brw->urb.nr_vs_entries % 8 == 0);
+ assert(brw->urb.nr_gs_entries % 8 == 0);
--
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