Android.mk | 19 + Makefile.am | 6 Makefile.sources | 1 amdgpu/amdgpu-symbol-check | 4 amdgpu/amdgpu.h | 65 +++++ amdgpu/amdgpu_bo.c | 14 - amdgpu/amdgpu_cs.c | 181 ++++++++++++++- amdgpu/amdgpu_internal.h | 16 + amdgpu/libdrm_amdgpu.pc.in | 1 configure.ac | 62 +++-- debian/changelog | 7 debian/patches/01_default_perms.diff | 10 freedreno/freedreno_drmif.h | 1 freedreno/kgsl/kgsl_pipe.c | 3 freedreno/msm/msm_drm.h | 1 freedreno/msm/msm_pipe.c | 45 ++- include/drm/vc4_drm.h | 279 +++++++++++++++++++++++ intel/intel_chipset.h | 57 ++++ intel/intel_decode.c | 2 libkms/libkms.pc.in | 1 radeon/libdrm_radeon.pc.in | 1 radeon/radeon_bo_gem.c | 2 tests/amdgpu/basic_tests.c | 417 +++++++++++++++++++++++++++++++---- tests/kms/kms-steal-crtc.c | 3 tests/kms/kms-universal-planes.c | 3 tests/kmstest/Makefile.am | 6 tests/kmstest/main.c | 45 ++- tests/modetest/modetest.c | 7 tests/proptest/proptest.c | 2 tests/util/kms.c | 2 tests/vbltest/vbltest.c | 7 vc4/Makefile.am | 34 ++ vc4/Makefile.sources | 3 vc4/libdrm_vc4.pc.in | 9 vc4/vc4_packet.h | 397 +++++++++++++++++++++++++++++++++ vc4/vc4_qpu_defines.h | 274 ++++++++++++++++++++++ xf86drm.c | 3 xf86drmMode.c | 11 38 files changed, 1871 insertions(+), 130 deletions(-)
New commits: commit d9c9309ebaac42de2dcdba23d0da558c03c73429 Author: Timo Aaltonen <tjaal...@debian.org> Date: Tue Feb 16 10:20:17 2016 +0200 refresh patch, update changelog diff --git a/debian/changelog b/debian/changelog index d523a04..a5e4427 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,10 @@ +libdrm (2.4.67-1) UNRELEASED; urgency=medium + + * New upstream release. + * patches: Refreshed. + + -- Timo Aaltonen <tjaal...@debian.org> Tue, 16 Feb 2016 10:05:33 +0200 + libdrm (2.4.66-2) unstable; urgency=medium * Update libdrm-exynos1.symbols and shlibs. diff --git a/debian/patches/01_default_perms.diff b/debian/patches/01_default_perms.diff index 8315ba9..cea04a4 100644 --- a/debian/patches/01_default_perms.diff +++ b/debian/patches/01_default_perms.diff @@ -1,7 +1,5 @@ -Index: libdrm/xf86drm.h -=================================================================== ---- libdrm.orig/xf86drm.h -+++ libdrm/xf86drm.h +--- a/xf86drm.h ++++ b/xf86drm.h @@ -74,7 +74,7 @@ extern "C" { /* Default /dev/dri directory permissions 0755 */ #define DRM_DEV_DIRMODE \ @@ -9,5 +7,5 @@ Index: libdrm/xf86drm.h -#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP) +#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH) - #define DRM_DIR_NAME "/dev/dri" - #define DRM_DEV_NAME "%s/card%d" + #ifdef __OpenBSD__ + #define DRM_DIR_NAME "/dev" commit d49efb55846c6ec96400061213b76ab867461c1a Author: Rob Clark <robcl...@freedesktop.org> Date: Mon Feb 15 13:42:51 2016 -0500 Bump version for release Signed-off-by: Rob Clark <robcl...@freedesktop.org> diff --git a/configure.ac b/configure.ac index 4eeebfb..ed07789 100644 --- a/configure.ac +++ b/configure.ac @@ -20,7 +20,7 @@ AC_PREREQ([2.63]) AC_INIT([libdrm], - [2.4.66], + [2.4.67], [https://bugs.freedesktop.org/enter_bug.cgi?product=DRI], [libdrm]) commit 9b77443f6344791851a6c2067e4081b7f43618ea Author: Rob Clark <robcl...@freedesktop.org> Date: Wed Feb 10 12:27:33 2016 -0500 freedreno: add support for FD_MAX_FREQ Only msm backend supports this. Sorry, if you are using kgsl, no time-elapsed query for you. Signed-off-by: Rob Clark <robcl...@freedesktop.org> diff --git a/freedreno/freedreno_drmif.h b/freedreno/freedreno_drmif.h index 5547e94..950fd63 100644 --- a/freedreno/freedreno_drmif.h +++ b/freedreno/freedreno_drmif.h @@ -50,6 +50,7 @@ enum fd_param_id { FD_GMEM_SIZE, FD_GPU_ID, FD_CHIP_ID, + FD_MAX_FREQ, }; /* bo flags: */ diff --git a/freedreno/kgsl/kgsl_pipe.c b/freedreno/kgsl/kgsl_pipe.c index 58b3b4d..5569da0 100644 --- a/freedreno/kgsl/kgsl_pipe.c +++ b/freedreno/kgsl/kgsl_pipe.c @@ -50,6 +50,9 @@ static int kgsl_pipe_get_param(struct fd_pipe *pipe, case FD_CHIP_ID: *value = kgsl_pipe->devinfo.chip_id; return 0; + case FD_MAX_FREQ: + /* unsupported on kgsl */ + return -1; default: ERROR_MSG("invalid param id: %d", param); return -1; diff --git a/freedreno/msm/msm_pipe.c b/freedreno/msm/msm_pipe.c index 38db21d..f539b9a 100644 --- a/freedreno/msm/msm_pipe.c +++ b/freedreno/msm/msm_pipe.c @@ -67,6 +67,8 @@ static int msm_pipe_get_param(struct fd_pipe *pipe, case FD_CHIP_ID: *value = msm_pipe->chip_id; return 0; + case FD_MAX_FREQ: + return query_param(pipe, MSM_PARAM_MAX_FREQ, value); default: ERROR_MSG("invalid param id: %d", param); return -1; commit bc5497d061aaaf31e6b38109443c20e1ebfd21a3 Author: Rob Clark <robcl...@freedesktop.org> Date: Wed Feb 10 12:26:55 2016 -0500 freedreno: small refactor for get_param Will simplify next commit. Signed-off-by: Rob Clark <robcl...@freedesktop.org> diff --git a/freedreno/msm/msm_pipe.c b/freedreno/msm/msm_pipe.c index aa0866b..38db21d 100644 --- a/freedreno/msm/msm_pipe.c +++ b/freedreno/msm/msm_pipe.c @@ -32,6 +32,25 @@ #include "msm_priv.h" +static int query_param(struct fd_pipe *pipe, uint32_t param, + uint64_t *value) +{ + struct msm_pipe *msm_pipe = to_msm_pipe(pipe); + struct drm_msm_param req = { + .pipe = msm_pipe->pipe, + .param = param, + }; + int ret; + + ret = drmCommandWriteRead(pipe->dev->fd, DRM_MSM_GET_PARAM, + &req, sizeof(req)); + if (ret) + return ret; + + *value = req.value; + + return 0; +} static int msm_pipe_get_param(struct fd_pipe *pipe, enum fd_param_id param, uint64_t *value) @@ -87,21 +106,15 @@ static const struct fd_pipe_funcs funcs = { .destroy = msm_pipe_destroy, }; -static uint64_t get_param(struct fd_device *dev, uint32_t pipe, uint32_t param) +static uint64_t get_param(struct fd_pipe *pipe, uint32_t param) { - struct drm_msm_param req = { - .pipe = pipe, - .param = param, - }; - int ret; - - ret = drmCommandWriteRead(dev->fd, DRM_MSM_GET_PARAM, &req, sizeof(req)); + uint64_t value; + int ret = query_param(pipe, param, &value); if (ret) { ERROR_MSG("get-param failed! %d (%s)", ret, strerror(errno)); return 0; } - - return req.value; + return value; } drm_private struct fd_pipe * msm_pipe_new(struct fd_device *dev, @@ -123,10 +136,14 @@ drm_private struct fd_pipe * msm_pipe_new(struct fd_device *dev, pipe = &msm_pipe->base; pipe->funcs = &funcs; + /* initialize before get_param(): */ + pipe->dev = dev; msm_pipe->pipe = pipe_id[id]; - msm_pipe->gpu_id = get_param(dev, pipe_id[id], MSM_PARAM_GPU_ID); - msm_pipe->gmem = get_param(dev, pipe_id[id], MSM_PARAM_GMEM_SIZE); - msm_pipe->chip_id = get_param(dev, pipe_id[id], MSM_PARAM_CHIP_ID); + + /* these params should be supported since the first version of drm/msm: */ + msm_pipe->gpu_id = get_param(pipe, MSM_PARAM_GPU_ID); + msm_pipe->gmem = get_param(pipe, MSM_PARAM_GMEM_SIZE); + msm_pipe->chip_id = get_param(pipe, MSM_PARAM_CHIP_ID); if (! msm_pipe->gpu_id) goto fail; commit c47385ccdae1d3a461e35c558af34431f10c83e2 Author: Rob Clark <robcl...@freedesktop.org> Date: Wed Feb 10 12:26:20 2016 -0500 freedreno: update uapi In drm-next.. needed for time-elapsed (and future perf ctrs) in mesa. Signed-off-by: Rob Clark <robcl...@freedesktop.org> diff --git a/freedreno/msm/msm_drm.h b/freedreno/msm/msm_drm.h index f7474c5..baf505c 100644 --- a/freedreno/msm/msm_drm.h +++ b/freedreno/msm/msm_drm.h @@ -58,6 +58,7 @@ struct drm_msm_timespec { #define MSM_PARAM_GPU_ID 0x01 #define MSM_PARAM_GMEM_SIZE 0x02 #define MSM_PARAM_CHIP_ID 0x03 +#define MSM_PARAM_MAX_FREQ 0x04 struct drm_msm_param { uint32_t pipe; /* in, MSM_PIPE_x */ commit f884af9b57ff480d3c87870d8b40055d9c8c6cfe Author: Ken Wang <qingqing.w...@amd.com> Date: Thu Feb 4 13:52:22 2016 +0800 amdgpu: fix for submition with no ibs Avoid a crash if no IBs are specified. Signed-off-by: Ken Wang <qingqing.w...@amd.com> Reviewed-by: Alex Deucher <alexander.deuc...@amd.com> diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c index b4f41b0..fb5b3a8 100644 --- a/amdgpu/amdgpu_cs.c +++ b/amdgpu/amdgpu_cs.c @@ -190,6 +190,10 @@ static int amdgpu_cs_submit_one(amdgpu_context_handle context, return -EINVAL; if (ibs_request->number_of_ibs > AMDGPU_CS_MAX_IBS_PER_SUBMIT) return -EINVAL; + if (ibs_request->number_of_ibs == 0) { + ibs_request->seq_no = AMDGPU_NULL_SUBMIT_SEQ; + return 0; + } user_fence = (ibs_request->fence_info.handle != NULL); size = ibs_request->number_of_ibs + (user_fence ? 2 : 1) + 1; @@ -422,6 +426,10 @@ int amdgpu_cs_query_fence_status(struct amdgpu_cs_fence *fence, return -EINVAL; if (fence->ring >= AMDGPU_CS_MAX_RINGS) return -EINVAL; + if (fence->fence == AMDGPU_NULL_SUBMIT_SEQ) { + *expired = true; + return 0; + } *expired = false; diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h index 557ba1f..4f039b6 100644 --- a/amdgpu/amdgpu_internal.h +++ b/amdgpu/amdgpu_internal.h @@ -44,6 +44,7 @@ #define ROUND_DOWN(x, y) ((x) & ~__round_mask(x, y)) #define AMDGPU_INVALID_VA_ADDRESS 0xffffffffffffffff +#define AMDGPU_NULL_SUBMIT_SEQ 0 struct amdgpu_bo_va_hole { struct list_head list; commit 6950af4e8475fa969ba46675fe2665c842fc4b79 Author: Alex Deucher <alexander.deuc...@amd.com> Date: Wed Feb 3 18:59:33 2016 -0500 tests/amdgpu: add a test for cp dma copy Use the CP to copy data between buffers Reviewed-by: Ken Wang <qingqing.w...@amd.com> Signed-off-by: Alex Deucher <alexander.deuc...@amd.com> diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 5a02ab5..4ef6014 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -455,12 +455,19 @@ static void amdgpu_command_submission_cp_const_fill(void) amdgpu_command_submission_const_fill_helper(AMDGPU_HW_IP_GFX); } +static void amdgpu_command_submission_cp_copy_data(void) +{ + amdgpu_command_submission_copy_linear_helper(AMDGPU_HW_IP_GFX); +} + static void amdgpu_command_submission_gfx(void) { /* write data using the CP */ amdgpu_command_submission_cp_write_data(); /* const fill using the CP */ amdgpu_command_submission_cp_const_fill(); + /* copy data using the CP */ + amdgpu_command_submission_cp_copy_data(); /* separate IB buffers for multi-IB submission */ amdgpu_command_submission_gfx_separate_ibs(); /* shared IB buffer for multi-IB submission */ @@ -1023,6 +1030,17 @@ static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type) pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; pm4[i++] = 0xffffffff & bo2_mc; pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; + } else if (ip_type == AMDGPU_HW_IP_GFX) { + pm4[i++] = PACKET3(PACKET3_DMA_DATA, 5); + pm4[i++] = PACKET3_DMA_DATA_ENGINE(0) | + PACKET3_DMA_DATA_DST_SEL(0) | + PACKET3_DMA_DATA_SRC_SEL(0) | + PACKET3_DMA_DATA_CP_SYNC; + pm4[i++] = 0xfffffffc & bo1_mc; + pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; + pm4[i++] = 0xfffffffc & bo2_mc; + pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; + pm4[i++] = sdma_write_length; } amdgpu_test_exec_cs_helper(context_handle, commit 35c35ea66d7940e78cf375e569e659f66e9fb69d Author: Alex Deucher <alexander.deuc...@amd.com> Date: Wed Feb 3 18:55:20 2016 -0500 tests/amdgpu: make amdgpu_command_submission_sdma_copy_linear generic So it can be shared for CP tests. Reviewed-by: Ken Wang <qingqing.w...@amd.com> Signed-off-by: Alex Deucher <alexander.deuc...@amd.com> diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index a116154..5a02ab5 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -51,6 +51,7 @@ static void amdgpu_semaphore_test(void); static void amdgpu_command_submission_write_linear_helper(unsigned ip_type); static void amdgpu_command_submission_const_fill_helper(unsigned ip_type); +static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type); CU_TestInfo basic_tests[] = { { "Query Info Test", amdgpu_query_info_test }, @@ -949,7 +950,7 @@ static void amdgpu_command_submission_sdma_const_fill(void) amdgpu_command_submission_const_fill_helper(AMDGPU_HW_IP_DMA); } -static void amdgpu_command_submission_sdma_copy_linear(void) +static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type) { const int sdma_write_length = 1024; const int pm4_dw = 256; @@ -1014,17 +1015,18 @@ static void amdgpu_command_submission_sdma_copy_linear(void) /* fullfill PM4: test DMA copy linear */ i = j = 0; - pm4[i++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0); - pm4[i++] = sdma_write_length; - pm4[i++] = 0; - pm4[i++] = 0xffffffff & bo1_mc; - pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; - pm4[i++] = 0xffffffff & bo2_mc; - pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; - + if (ip_type == AMDGPU_HW_IP_DMA) { + pm4[i++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0); + pm4[i++] = sdma_write_length; + pm4[i++] = 0; + pm4[i++] = 0xffffffff & bo1_mc; + pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; + pm4[i++] = 0xffffffff & bo2_mc; + pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; + } amdgpu_test_exec_cs_helper(context_handle, - AMDGPU_HW_IP_DMA, 0, + ip_type, 0, i, pm4, 2, resources, ib_info, ibs_request); @@ -1055,6 +1057,11 @@ static void amdgpu_command_submission_sdma_copy_linear(void) CU_ASSERT_EQUAL(r, 0); } +static void amdgpu_command_submission_sdma_copy_linear(void) +{ + amdgpu_command_submission_copy_linear_helper(AMDGPU_HW_IP_DMA); +} + static void amdgpu_command_submission_sdma(void) { amdgpu_command_submission_sdma_write_linear(); commit 0edc442560c792f9dc1acdc51c0c1a3b586f38d9 Author: Alex Deucher <alexander.deuc...@amd.com> Date: Wed Feb 3 18:52:18 2016 -0500 tests/amdgpu: add a test for cp dma fill Use the CP to fill to memory. Reviewed-by: Ken Wang <qingqing.w...@amd.com> Signed-off-by: Alex Deucher <alexander.deuc...@amd.com> diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 3e54787..a116154 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -449,10 +449,17 @@ static void amdgpu_command_submission_cp_write_data(void) amdgpu_command_submission_write_linear_helper(AMDGPU_HW_IP_GFX); } +static void amdgpu_command_submission_cp_const_fill(void) +{ + amdgpu_command_submission_const_fill_helper(AMDGPU_HW_IP_GFX); +} + static void amdgpu_command_submission_gfx(void) { /* write data using the CP */ amdgpu_command_submission_cp_write_data(); + /* const fill using the CP */ + amdgpu_command_submission_cp_const_fill(); /* separate IB buffers for multi-IB submission */ amdgpu_command_submission_gfx_separate_ibs(); /* shared IB buffer for multi-IB submission */ @@ -896,6 +903,17 @@ static void amdgpu_command_submission_const_fill_helper(unsigned ip_type) pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; pm4[i++] = 0xdeadbeaf; pm4[i++] = sdma_write_length; + } else if (ip_type == AMDGPU_HW_IP_GFX) { + pm4[i++] = PACKET3(PACKET3_DMA_DATA, 5); + pm4[i++] = PACKET3_DMA_DATA_ENGINE(0) | + PACKET3_DMA_DATA_DST_SEL(0) | + PACKET3_DMA_DATA_SRC_SEL(2) | + PACKET3_DMA_DATA_CP_SYNC; + pm4[i++] = 0xdeadbeaf; + pm4[i++] = 0; + pm4[i++] = 0xfffffffc & bo_mc; + pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; + pm4[i++] = sdma_write_length; } amdgpu_test_exec_cs_helper(context_handle, commit 7c656ba72fb9f004c2bd6b578fe68966d9ef9118 Author: Alex Deucher <alexander.deuc...@amd.com> Date: Wed Feb 3 18:38:50 2016 -0500 tests/amdgpu: make amdgpu_command_submission_sdma_const_fill generic So it can be shared for CP tests. Reviewed-by: Ken Wang <qingqing.w...@amd.com> Signed-off-by: Alex Deucher <alexander.deuc...@amd.com> diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index dbfcfff..3e54787 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -50,6 +50,7 @@ static void amdgpu_userptr_test(void); static void amdgpu_semaphore_test(void); static void amdgpu_command_submission_write_linear_helper(unsigned ip_type); +static void amdgpu_command_submission_const_fill_helper(unsigned ip_type); CU_TestInfo basic_tests[] = { { "Query Info Test", amdgpu_query_info_test }, @@ -839,7 +840,7 @@ static void amdgpu_command_submission_sdma_write_linear(void) amdgpu_command_submission_write_linear_helper(AMDGPU_HW_IP_DMA); } -static void amdgpu_command_submission_sdma_const_fill(void) +static void amdgpu_command_submission_const_fill_helper(unsigned ip_type) { const int sdma_write_length = 1024 * 1024; const int pm4_dw = 256; @@ -888,15 +889,17 @@ static void amdgpu_command_submission_sdma_const_fill(void) /* fullfill PM4: test DMA const fill */ i = j = 0; - pm4[i++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0, - SDMA_CONSTANT_FILL_EXTRA_SIZE(2)); - pm4[i++] = 0xffffffff & bo_mc; - pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; - pm4[i++] = 0xdeadbeaf; - pm4[i++] = sdma_write_length; + if (ip_type == AMDGPU_HW_IP_DMA) { + pm4[i++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0, + SDMA_CONSTANT_FILL_EXTRA_SIZE(2)); + pm4[i++] = 0xffffffff & bo_mc; + pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; + pm4[i++] = 0xdeadbeaf; + pm4[i++] = sdma_write_length; + } amdgpu_test_exec_cs_helper(context_handle, - AMDGPU_HW_IP_DMA, 0, + ip_type, 0, i, pm4, 1, resources, ib_info, ibs_request); @@ -923,6 +926,11 @@ static void amdgpu_command_submission_sdma_const_fill(void) CU_ASSERT_EQUAL(r, 0); } +static void amdgpu_command_submission_sdma_const_fill(void) +{ + amdgpu_command_submission_const_fill_helper(AMDGPU_HW_IP_DMA); +} + static void amdgpu_command_submission_sdma_copy_linear(void) { const int sdma_write_length = 1024; commit 47c7e7a6dd92c7c60c899b7103cf2a4457f83936 Author: Alex Deucher <alexander.deuc...@amd.com> Date: Wed Feb 3 18:33:45 2016 -0500 tests/amdgpu: add a test for cp write data Use the CP to write data to memory. Reviewed-by: Ken Wang <qingqing.w...@amd.com> Signed-off-by: Alex Deucher <alexander.deuc...@amd.com> diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 6f238bc..dbfcfff 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -84,6 +84,117 @@ CU_TestInfo basic_tests[] = { #define GFX_COMPUTE_NOP 0xffff1000 #define SDMA_NOP 0x0 +/* PM4 */ +#define PACKET_TYPE0 0 +#define PACKET_TYPE1 1 +#define PACKET_TYPE2 2 +#define PACKET_TYPE3 3 + +#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3) +#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF) +#define CP_PACKET0_GET_REG(h) ((h) & 0xFFFF) +#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF) +#define PACKET0(reg, n) ((PACKET_TYPE0 << 30) | \ + ((reg) & 0xFFFF) | \ + ((n) & 0x3FFF) << 16) +#define CP_PACKET2 0x80000000 +#define PACKET2_PAD_SHIFT 0 +#define PACKET2_PAD_MASK (0x3fffffff << 0) + +#define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) + +#define PACKET3(op, n) ((PACKET_TYPE3 << 30) | \ + (((op) & 0xFF) << 8) | \ + ((n) & 0x3FFF) << 16) + +/* Packet 3 types */ +#define PACKET3_NOP 0x10 + +#define PACKET3_WRITE_DATA 0x37 +#define WRITE_DATA_DST_SEL(x) ((x) << 8) + /* 0 - register + * 1 - memory (sync - via GRBM) + * 2 - gl2 + * 3 - gds + * 4 - reserved + * 5 - memory (async - direct) + */ +#define WR_ONE_ADDR (1 << 16) +#define WR_CONFIRM (1 << 20) +#define WRITE_DATA_CACHE_POLICY(x) ((x) << 25) + /* 0 - LRU + * 1 - Stream + */ +#define WRITE_DATA_ENGINE_SEL(x) ((x) << 30) + /* 0 - me + * 1 - pfp + * 2 - ce + */ + +#define PACKET3_DMA_DATA 0x50 +/* 1. header + * 2. CONTROL + * 3. SRC_ADDR_LO or DATA [31:0] + * 4. SRC_ADDR_HI [31:0] + * 5. DST_ADDR_LO [31:0] + * 6. DST_ADDR_HI [7:0] + * 7. COMMAND [30:21] | BYTE_COUNT [20:0] + */ +/* CONTROL */ +# define PACKET3_DMA_DATA_ENGINE(x) ((x) << 0) + /* 0 - ME + * 1 - PFP + */ +# define PACKET3_DMA_DATA_SRC_CACHE_POLICY(x) ((x) << 13) + /* 0 - LRU + * 1 - Stream + * 2 - Bypass + */ +# define PACKET3_DMA_DATA_SRC_VOLATILE (1 << 15) +# define PACKET3_DMA_DATA_DST_SEL(x) ((x) << 20) + /* 0 - DST_ADDR using DAS + * 1 - GDS + * 3 - DST_ADDR using L2 + */ +# define PACKET3_DMA_DATA_DST_CACHE_POLICY(x) ((x) << 25) + /* 0 - LRU + * 1 - Stream + * 2 - Bypass + */ +# define PACKET3_DMA_DATA_DST_VOLATILE (1 << 27) +# define PACKET3_DMA_DATA_SRC_SEL(x) ((x) << 29) + /* 0 - SRC_ADDR using SAS + * 1 - GDS + * 2 - DATA + * 3 - SRC_ADDR using L2 + */ +# define PACKET3_DMA_DATA_CP_SYNC (1 << 31) +/* COMMAND */ +# define PACKET3_DMA_DATA_DIS_WC (1 << 21) +# define PACKET3_DMA_DATA_CMD_SRC_SWAP(x) ((x) << 22) + /* 0 - none + * 1 - 8 in 16 + * 2 - 8 in 32 + * 3 - 8 in 64 + */ +# define PACKET3_DMA_DATA_CMD_DST_SWAP(x) ((x) << 24) + /* 0 - none + * 1 - 8 in 16 + * 2 - 8 in 32 + * 3 - 8 in 64 + */ +# define PACKET3_DMA_DATA_CMD_SAS (1 << 26) + /* 0 - memory + * 1 - register + */ +# define PACKET3_DMA_DATA_CMD_DAS (1 << 27) + /* 0 - memory + * 1 - register + */ +# define PACKET3_DMA_DATA_CMD_SAIC (1 << 28) +# define PACKET3_DMA_DATA_CMD_DAIC (1 << 29) +# define PACKET3_DMA_DATA_CMD_RAW_WAIT (1 << 30) + int suite_basic_tests_init(void) { int r; @@ -332,8 +443,15 @@ static void amdgpu_command_submission_gfx_shared_ib(void) CU_ASSERT_EQUAL(r, 0); } +static void amdgpu_command_submission_cp_write_data(void) +{ + amdgpu_command_submission_write_linear_helper(AMDGPU_HW_IP_GFX); +} + static void amdgpu_command_submission_gfx(void) { + /* write data using the CP */ + amdgpu_command_submission_cp_write_data(); /* separate IB buffers for multi-IB submission */ amdgpu_command_submission_gfx_separate_ibs(); /* shared IB buffer for multi-IB submission */ @@ -679,6 +797,13 @@ static void amdgpu_command_submission_write_linear_helper(unsigned ip_type) pm4[i++] = sdma_write_length; while(j++ < sdma_write_length) pm4[i++] = 0xdeadbeaf; + } else if (ip_type == AMDGPU_HW_IP_GFX) { + pm4[i++] = PACKET3(PACKET3_WRITE_DATA, 2 + sdma_write_length); + pm4[i++] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; + pm4[i++] = 0xfffffffc & bo_mc; + pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; + while(j++ < sdma_write_length) + pm4[i++] = 0xdeadbeaf; } amdgpu_test_exec_cs_helper(context_handle, commit c5da5eade0b5769fce40f79fbad9153ea760b954 Author: Alex Deucher <alexander.deuc...@amd.com> Date: Thu Feb 4 12:23:43 2016 -0500 tests/amdgpu: make amdgpu_command_submission_sdma_write_linear generic So it can be shared for CP tests. Reviewed-by: Ken Wang <qingqing.w...@amd.com> Signed-off-by: Alex Deucher <alexander.deuc...@amd.com> diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index df5f5bc..6f238bc 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -49,6 +49,8 @@ static void amdgpu_command_submission_sdma(void); static void amdgpu_userptr_test(void); static void amdgpu_semaphore_test(void); +static void amdgpu_command_submission_write_linear_helper(unsigned ip_type); + CU_TestInfo basic_tests[] = { { "Query Info Test", amdgpu_query_info_test }, { "Memory alloc Test", amdgpu_memory_alloc }, @@ -619,7 +621,7 @@ static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle, CU_ASSERT_EQUAL(r, 0); } -static void amdgpu_command_submission_sdma_write_linear(void) +static void amdgpu_command_submission_write_linear_helper(unsigned ip_type) { const int sdma_write_length = 128; const int pm4_dw = 256; @@ -669,16 +671,18 @@ static void amdgpu_command_submission_sdma_write_linear(void) /* fullfill PM4: test DMA write-linear */ i = j = 0; - pm4[i++] = SDMA_PACKET(SDMA_OPCODE_WRITE, - SDMA_WRITE_SUB_OPCODE_LINEAR, 0); - pm4[i++] = 0xffffffff & bo_mc; - pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; - pm4[i++] = sdma_write_length; - while(j++ < sdma_write_length) - pm4[i++] = 0xdeadbeaf; + if (ip_type == AMDGPU_HW_IP_DMA) { + pm4[i++] = SDMA_PACKET(SDMA_OPCODE_WRITE, + SDMA_WRITE_SUB_OPCODE_LINEAR, 0); + pm4[i++] = 0xffffffff & bo_mc; + pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; + pm4[i++] = sdma_write_length; + while(j++ < sdma_write_length) + pm4[i++] = 0xdeadbeaf; + } amdgpu_test_exec_cs_helper(context_handle, - AMDGPU_HW_IP_DMA, 0, + ip_type, 0, i, pm4, 1, resources, ib_info, ibs_request); @@ -705,6 +709,11 @@ static void amdgpu_command_submission_sdma_write_linear(void) CU_ASSERT_EQUAL(r, 0); } +static void amdgpu_command_submission_sdma_write_linear(void) +{ + amdgpu_command_submission_write_linear_helper(AMDGPU_HW_IP_DMA); +} + static void amdgpu_command_submission_sdma_const_fill(void) { const int sdma_write_length = 1024 * 1024; commit 8be79be0433ba64c4674c3394b3fc8cbc33c46af Author: Alex Deucher <alexander.deuc...@amd.com> Date: Wed Feb 3 18:14:48 2016 -0500 tests/amdgpu: make amdgpu_sdma_test_exec_cs() generic (v2) Share with upcoming CP tests. v2: drop unnecessary forward declaration Reviewed-by: Ken Wang <qingqing.w...@amd.com> Signed-off-by: Alex Deucher <alexander.deuc...@amd.com> diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index fa0ed12..df5f5bc 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -542,11 +542,12 @@ static void amdgpu_command_submission_compute(void) * pm4_src, resources, ib_info, and ibs_request * submit command stream described in ibs_request and wait for this IB accomplished */ -static void amdgpu_sdma_test_exec_cs(amdgpu_context_handle context_handle, - int instance, int pm4_dw, uint32_t *pm4_src, - int res_cnt, amdgpu_bo_handle *resources, - struct amdgpu_cs_ib_info *ib_info, - struct amdgpu_cs_request *ibs_request) +static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle, + unsigned ip_type, + int instance, int pm4_dw, uint32_t *pm4_src, + int res_cnt, amdgpu_bo_handle *resources, + struct amdgpu_cs_ib_info *ib_info, + struct amdgpu_cs_request *ibs_request) { int r; uint32_t expired; @@ -579,7 +580,7 @@ static void amdgpu_sdma_test_exec_cs(amdgpu_context_handle context_handle, ib_info->ib_mc_address = ib_result_mc_address; ib_info->size = pm4_dw; - ibs_request->ip_type = AMDGPU_HW_IP_DMA; + ibs_request->ip_type = ip_type; ibs_request->ring = instance; ibs_request->number_of_ibs = 1; ibs_request->ibs = ib_info; @@ -601,7 +602,7 @@ static void amdgpu_sdma_test_exec_cs(amdgpu_context_handle context_handle, r = amdgpu_bo_list_destroy(ibs_request->resources); CU_ASSERT_EQUAL(r, 0); - fence_status.ip_type = AMDGPU_HW_IP_DMA; + fence_status.ip_type = ip_type; fence_status.ring = ibs_request->ring; fence_status.context = context_handle; fence_status.fence = ibs_request->seq_no; @@ -676,10 +677,11 @@ static void amdgpu_command_submission_sdma_write_linear(void) while(j++ < sdma_write_length) pm4[i++] = 0xdeadbeaf; - amdgpu_sdma_test_exec_cs(context_handle, 0, - i, pm4, - 1, resources, - ib_info, ibs_request); + amdgpu_test_exec_cs_helper(context_handle, + AMDGPU_HW_IP_DMA, 0, + i, pm4, + 1, resources, + ib_info, ibs_request); /* verify if SDMA test result meets with expected */ i = 0; @@ -759,10 +761,11 @@ static void amdgpu_command_submission_sdma_const_fill(void) pm4[i++] = 0xdeadbeaf; pm4[i++] = sdma_write_length; - amdgpu_sdma_test_exec_cs(context_handle, 0, - i, pm4, - 1, resources, - ib_info, ibs_request); + amdgpu_test_exec_cs_helper(context_handle, + AMDGPU_HW_IP_DMA, 0, + i, pm4, + 1, resources, + ib_info, ibs_request); /* verify if SDMA test result meets with expected */ i = 0; @@ -860,10 +863,11 @@ static void amdgpu_command_submission_sdma_copy_linear(void) pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; - amdgpu_sdma_test_exec_cs(context_handle, 0, - i, pm4, - 2, resources, - ib_info, ibs_request); + amdgpu_test_exec_cs_helper(context_handle, + AMDGPU_HW_IP_DMA, 0, + i, pm4, + 2, resources, + ib_info, ibs_request); /* verify if SDMA test result meets with expected */ i = 0; @@ -954,10 +958,11 @@ static void amdgpu_userptr_test(void) while (j++ < sdma_write_length) pm4[i++] = 0xdeadbeaf; - amdgpu_sdma_test_exec_cs(context_handle, 0, - i, pm4, - 1, &handle, - ib_info, ibs_request); + amdgpu_test_exec_cs_helper(context_handle, + AMDGPU_HW_IP_DMA, 0, + i, pm4, + 1, &handle, + ib_info, ibs_request); i = 0; while (i < sdma_write_length) { CU_ASSERT_EQUAL(((int*)ptr)[i++], 0xdeadbeaf); commit 682eaa05e6bc6b191b826e1c9db4446caea43c49 Author: Sumit Semwal <sumit.sem...@linaro.org> Date: Fri Jan 29 10:00:47 2016 -0600 android: enable building static version of libdrm Android needs libdrm built statically for recovery; enable that as well. Signed-off-by: Sumit Semwal <sumit.sem...@linaro.org> Signed-off-by: Rob Herring <r...@kernel.org> Cc: Chih-Wei Huang <cwhu...@linux.org.tw> Reviewed-by: Emil Velikov <emil.l.veli...@gmail.com> diff --git a/Android.mk b/Android.mk index 90cdcb3..1d8cd65 100644 --- a/Android.mk +++ b/Android.mk @@ -27,6 +27,8 @@ include $(CLEAR_VARS) # Import variables LIBDRM_{,H_,INCLUDE_H_,INCLUDE_VMWGFX_H_}FILES include $(LOCAL_PATH)/Makefile.sources +#static library for the device (recovery) +include $(CLEAR_VARS) LOCAL_MODULE := libdrm LOCAL_MODULE_TAGS := optional @@ -41,7 +43,24 @@ LOCAL_C_INCLUDES := \ LOCAL_CFLAGS := \ -DHAVE_VISIBILITY=1 \ -DHAVE_LIBDRM_ATOMIC_PRIMITIVES=1 +include $(BUILD_STATIC_LIBRARY) + +# Shared library for the device +include $(CLEAR_VARS) +LOCAL_MODULE := libdrm +LOCAL_MODULE_TAGS := optional +LOCAL_SRC_FILES := $(LIBDRM_FILES) +LOCAL_EXPORT_C_INCLUDE_DIRS := \ + $(LOCAL_PATH) \ + $(LOCAL_PATH)/include/drm + +LOCAL_C_INCLUDES := \ + $(LOCAL_PATH)/include/drm + +LOCAL_CFLAGS := \ + -DHAVE_VISIBILITY=1 \ + -DHAVE_LIBDRM_ATOMIC_PRIMITIVES=1 include $(BUILD_SHARED_LIBRARY) include $(call all-makefiles-under,$(LOCAL_PATH)) commit ca5017b69c43ef3bfada0abb77a82de1de345075 Author: Emil Velikov <emil.l.veli...@gmail.com> Date: Thu Jan 28 11:39:03 2016 +0000 libkms: add libdrm to Requires.private Analogous to last two changes (amdgpu and radeon). Signed-off-by: Emil Velikov <emil.l.veli...@gmail.com> Reviewed-by: Jakob Bornecrantz <wallbra...@gmail.com> Reviewed-by: Michel Dänzer <michel.daen...@amd.com> diff --git a/libkms/libkms.pc.in b/libkms/libkms.pc.in index 511535a..1421b3e 100644 --- a/libkms/libkms.pc.in +++ b/libkms/libkms.pc.in @@ -8,3 +8,4 @@ Description: Library that abstract aways the different mm interface for kernel d Version: 1.0.0 Libs: -L${libdir} -lkms Cflags: -I${includedir}/libkms +Requires.private: libdrm commit 31badf031c90aba4609e1464e252311f96733a5e Author: Emil Velikov <emil.l.veli...@gmail.com> Date: Thu Jan 28 11:33:34 2016 +0000 radeon: add libdrm to Requires.private