configure.ac | 12 + src/Makefile.am | 21 +- src/ati.c | 62 +++++++ src/atidri.c | 25 +-- src/atimach64probe.c | 2 src/atipciids.h | 2 src/atipcirename.h | 122 +++++++++++++++ src/atipreinit.c | 126 ++++++--------- src/atiprint.c | 10 - src/atiprobe.c | 75 ++++----- src/atistruct.h | 2 src/atividmem.c | 122 +++++++++++++++ src/r128_probe.c | 2 src/radeon.h | 16 + src/radeon_accel.c | 2 src/radeon_bios.c | 393 +++++++++++++++++++------------------------------ src/radeon_chipset.h | 2 src/radeon_display.c | 5 src/radeon_dri.c | 22 +- src/radeon_driver.c | 205 +++++++++++++++---------- src/radeon_exa.c | 2 src/radeon_exa_funcs.c | 19 +- src/radeon_modes.c | 113 +++++++++----- src/radeon_output.c | 150 ++++++++++++++++-- src/radeon_probe.c | 4 src/radeon_probe.h | 5 src/radeon_reg.h | 4 src/radeon_video.c | 6 28 files changed, 992 insertions(+), 539 deletions(-)
New commits: commit 83d7506a603889b6c18736cff9b2cd3296c95c84 Author: Alex Deucher <[EMAIL PROTECTED](none)> Date: Fri Oct 5 20:25:04 2007 -0400 Bump for RC release diff --git a/configure.ac b/configure.ac index c662168..5f18d2b 100644 --- a/configure.ac +++ b/configure.ac @@ -22,7 +22,7 @@ AC_PREREQ(2.57) AC_INIT([xf86-video-ati], - 6.7.194, + 6.7.195, [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg], xf86-video-ati) commit fe66cc4e02a52e1d014ae5de192c65e8abd7f58a Author: Tormod Volden <[EMAIL PROTECTED]> Date: Fri Oct 5 20:10:55 2007 -0400 RADEON: rename to PCI_CHIP_RS485_5975 everywhere RS482_5975 is actually RS485. see bug 12048 diff --git a/src/atipciids.h b/src/atipciids.h index 1c0f59a..2aa8a3e 100644 --- a/src/atipciids.h +++ b/src/atipciids.h @@ -252,7 +252,7 @@ #define PCI_CHIP_RV280_5965 0x5965 #define PCI_CHIP_RN50_5969 0x5969 #define PCI_CHIP_RS482_5974 0x5974 -#define PCI_CHIP_RS482_5975 0x5975 +#define PCI_CHIP_RS485_5975 0x5975 #define PCI_CHIP_RS400_5A41 0x5A41 #define PCI_CHIP_RS400_5A42 0x5A42 #define PCI_CHIP_RC410_5A61 0x5A61 diff --git a/src/radeon_chipset.h b/src/radeon_chipset.h index 5cca4c8..890babd 100644 --- a/src/radeon_chipset.h +++ b/src/radeon_chipset.h @@ -89,7 +89,7 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_RS480_5954, "ATI Radeon XPRESS 200 5954 (PCIE)" }, { PCI_CHIP_RS480_5955, "ATI Radeon XPRESS 200M 5955 (PCIE)" }, { PCI_CHIP_RS482_5974, "ATI Radeon XPRESS 200 5974 (PCIE)" }, - { PCI_CHIP_RS482_5975, "ATI Radeon XPRESS 200M 5975 (PCIE)" }, + { PCI_CHIP_RS485_5975, "ATI Radeon XPRESS 200M 5975 (PCIE)" }, { PCI_CHIP_RV410_5E48, "ATI FireGL V5000 (RV410) (PCIE)" }, { PCI_CHIP_RV410_564A, "ATI Mobility FireGL V5000 (M26) (PCIE)" }, { PCI_CHIP_RV410_564B, "ATI Mobility FireGL V5000 (M26) (PCIE)" }, diff --git a/src/radeon_driver.c b/src/radeon_driver.c index e247f1d..03f531e 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -1673,7 +1673,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) case PCI_CHIP_RS400_5A42: case PCI_CHIP_RC410_5A62: case PCI_CHIP_RS480_5955: - case PCI_CHIP_RS482_5975: + case PCI_CHIP_RS485_5975: info->IsMobility = TRUE; case PCI_CHIP_RS400_5A41: case PCI_CHIP_RC410_5A61: @@ -2086,10 +2086,10 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn) info->Chipset == PCI_CHIP_RN50_5969 || info->Chipset == PCI_CHIP_RC410_5A61 || info->Chipset == PCI_CHIP_RC410_5A62 || - info->Chipset == PCI_CHIP_RS482_5975) { + info->Chipset == PCI_CHIP_RS485_5975) { if (xf86ReturnOptValBool(info->Options, OPTION_DRI, FALSE)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Direct rendering for RN50/RC410/RS482 forced on -- " + "Direct rendering for RN50/RC410/RS485 forced on -- " "This is NOT officially supported at the hardware level " "and may cause instability or lockups\n"); } else { @@ -2132,7 +2132,7 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn) info->Chipset == PCI_CHIP_RS480_5954 || info->Chipset == PCI_CHIP_RS480_5955 || info->Chipset == PCI_CHIP_RS482_5974 || - info->Chipset == PCI_CHIP_RS482_5975) { + info->Chipset == PCI_CHIP_RS485_5975) { if (info->pKernelDRMVersion->version_minor < 27) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, diff --git a/src/radeon_probe.c b/src/radeon_probe.c index 5c7d16f..d68a956 100644 --- a/src/radeon_probe.c +++ b/src/radeon_probe.c @@ -144,7 +144,7 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_RS480_5954, PCI_CHIP_RS480_5954, RES_SHARED_VGA }, { PCI_CHIP_RS480_5955, PCI_CHIP_RS480_5955, RES_SHARED_VGA }, { PCI_CHIP_RS482_5974, PCI_CHIP_RS482_5974, RES_SHARED_VGA }, - { PCI_CHIP_RS482_5975, PCI_CHIP_RS482_5975, RES_SHARED_VGA }, + { PCI_CHIP_RS485_5975, PCI_CHIP_RS485_5975, RES_SHARED_VGA }, { PCI_CHIP_RV410_5E48, PCI_CHIP_RV410_5E48, RES_SHARED_VGA }, { PCI_CHIP_RV410_564A, PCI_CHIP_RV410_564A, RES_SHARED_VGA }, { PCI_CHIP_RV410_564B, PCI_CHIP_RV410_564B, RES_SHARED_VGA }, commit 314e8fdbe5369e4c1786d176d03d0d2a046f25d5 Author: Tormod Volden <[EMAIL PROTECTED]> Date: Fri Oct 5 20:05:54 2007 -0400 RADEON: Disable DRI by default for RS482 cards fixes bug 12048 diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 6f8a753..e247f1d 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -2085,10 +2085,11 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn) if (info->Chipset == PCI_CHIP_RN50_515E || info->Chipset == PCI_CHIP_RN50_5969 || info->Chipset == PCI_CHIP_RC410_5A61 || - info->Chipset == PCI_CHIP_RC410_5A62) { + info->Chipset == PCI_CHIP_RC410_5A62 || + info->Chipset == PCI_CHIP_RS482_5975) { if (xf86ReturnOptValBool(info->Options, OPTION_DRI, FALSE)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Direct rendering for RN50/RC410 forced on -- " + "Direct rendering for RN50/RC410/RS482 forced on -- " "This is NOT officially supported at the hardware level " "and may cause instability or lockups\n"); } else { commit abbafe6db7c0d24efc61a05950d4214c00d3f043 Author: Michel Dänzer <[EMAIL PROTECTED]> Date: Thu Oct 4 11:33:09 2007 +0200 radeon: Fix compile warnings. diff --git a/src/radeon_bios.c b/src/radeon_bios.c index d5b7f5e..65c2bb0 100644 --- a/src/radeon_bios.c +++ b/src/radeon_bios.c @@ -765,7 +765,7 @@ Bool RADEONInitExtTMDSInfoFromBIOS (xf86OutputPtr output) val = RADEON_BIOS32(index); index += 4; ErrorF("WRITE INDEXED: 0x%x 0x%x\n", - reg, (unsigned)val); + (unsigned)reg, (unsigned)val); /*OUTREG(reg, val);*/ break; case 2: @@ -777,13 +777,13 @@ Bool RADEONInitExtTMDSInfoFromBIOS (xf86OutputPtr output) val = INREG(reg); val = (val & andmask) | ormask; ErrorF("MASK DIRECT: 0x%x 0x%x 0x%x\n", - reg, (unsigned)andmask, (unsigned)ormask); + (unsigned)reg, (unsigned)andmask, (unsigned)ormask); /*OUTREG(reg, val);*/ break; case 4: val = RADEON_BIOS16(index); index += 2; - ErrorF("delay: %d\n", val); + ErrorF("delay: %u\n", (unsigned)val); usleep(val); break; case 5: @@ -793,7 +793,7 @@ Bool RADEONInitExtTMDSInfoFromBIOS (xf86OutputPtr output) ormask = RADEON_BIOS32(index); index += 4; ErrorF("MASK PLL: 0x%x 0x%x 0x%x\n", - reg, (unsigned)andmask, (unsigned)ormask); + (unsigned)reg, (unsigned)andmask, (unsigned)ormask); /*val = INPLL(pScrn, reg); val = (val & andmask) | ormask; OUTPLL(pScrn, reg, val);*/ @@ -802,7 +802,8 @@ Bool RADEONInitExtTMDSInfoFromBIOS (xf86OutputPtr output) reg = id & 0x1fff; val = RADEON_BIOS8(index); index += 1; - ErrorF("i2c write: 0x%x, 0x%x\n", reg, val); + ErrorF("i2c write: 0x%x, 0x%x\n", (unsigned)reg, + (unsigned)val); RADEONDVOWriteByte(radeon_output->DVOChip, reg, val); break; default: commit 1110957ba703475847b8e72023c6edcbd1068aef Author: Michel Dänzer <[EMAIL PROTECTED]> Date: Thu Oct 4 11:32:48 2007 +0200 radeon: Fix for pci-rework. Surprisingly easy, thanks to George's pci-rework changes. diff --git a/src/Makefile.am b/src/Makefile.am index 16cbb66..1eea432 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -66,16 +66,6 @@ atimisc_drv_la_SOURCES = \ atiload.c atimisc.c atimach64probe.c $(ATIMISC_CPIO_SOURCES) \ $(ATIMISC_DGA_SOURCES) $(ATIMISC_DRI_SRCS) $(ATIMISC_EXA_SOURCES) -if XSERVER_LIBPCIACCESS -# r128, radeon and theatre have not been ported yet -else -r128_drv_la_LTLIBRARIES = r128_drv.la -r128_drv_la_LDFLAGS = -module -avoid-version -r128_drv_ladir = @moduledir@/drivers -r128_drv_la_SOURCES = \ - r128_accel.c r128_cursor.c r128_dga.c r128_driver.c \ - r128_video.c r128_misc.c r128_probe.c $(R128_DRI_SRCS) - radeon_drv_la_LTLIBRARIES = radeon_drv.la radeon_drv_la_LDFLAGS = -module -avoid-version radeon_drv_ladir = @moduledir@/drivers @@ -86,6 +76,16 @@ radeon_drv_la_SOURCES = \ radeon_crtc.c radeon_output.c radeon_modes.c radeon_tv.c \ $(RADEON_DRI_SRCS) $(RADEON_EXA_SOURCES) +if XSERVER_LIBPCIACCESS +# r128 and theatre have not been ported yet +else +r128_drv_la_LTLIBRARIES = r128_drv.la +r128_drv_la_LDFLAGS = -module -avoid-version +r128_drv_ladir = @moduledir@/drivers +r128_drv_la_SOURCES = \ + r128_accel.c r128_cursor.c r128_dga.c r128_driver.c \ + r128_video.c r128_misc.c r128_probe.c $(R128_DRI_SRCS) + theatre_detect_drv_la_LTLIBRARIES = theatre_detect_drv.la theatre_detect_drv_la_LDFLAGS = -module -avoid-version theatre_detect_drv_ladir = @moduledir@/multimedia diff --git a/src/atipcirename.h b/src/atipcirename.h index e30d10c..5aa6b80 100644 --- a/src/atipcirename.h +++ b/src/atipcirename.h @@ -41,6 +41,9 @@ enum region_type { #define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->chipType) #define PCI_DEV_REVISION(_pcidev) ((_pcidev)->chipRev) +#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subsysVendor) +#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subsysCard) + #define PCI_DEV_TAG(_pcidev) pciTag((_pcidev)->bus, \ (_pcidev)->device, \ (_pcidev)->func) @@ -65,6 +68,9 @@ enum region_type { (((_pcidev)->size[(_b)] > 0) ? (1 << (_pcidev)->size[(_b)]) : 0) /* read/write PCI configuration space */ +#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \ + *(_value_ptr) = pciReadByte(PCI_CFG_TAG(_pcidev), (_offset)) + #define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \ *(_value_ptr) = pciReadLong(PCI_CFG_TAG(_pcidev), (_offset)) @@ -79,6 +85,9 @@ typedef struct pci_device *pciVideoPtr; #define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id) #define PCI_DEV_REVISION(_pcidev) ((_pcidev)->revision) +#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subvendor_id) +#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subdevice_id) + /* pci-rework functions take a 'pci_device' parameter instead of a tag */ #define PCI_DEV_TAG(_pcidev) (_pcidev) @@ -99,6 +108,9 @@ typedef struct pci_device *pciVideoPtr; #define PCI_REGION_BASE(_pcidev, _b, _type) ((_pcidev)->regions[(_b)].base_addr) #define PCI_REGION_SIZE(_pcidev, _b) ((_pcidev)->regions[(_b)].size) +#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \ + pci_device_cfg_read_u8((_pcidev), (_value_ptr), (_offset)) + #define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \ pci_device_cfg_read_u32((_pcidev), (_value_ptr), (_offset)) diff --git a/src/radeon.h b/src/radeon.h index 610e2b3..ad94cc5 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -88,6 +88,8 @@ #include "picturestr.h" #endif +#include "atipcirename.h" + #ifndef MAX #define MAX(a,b) ((a)>(b)?(a):(b)) #endif @@ -456,8 +458,8 @@ typedef struct { CARD32 mc_fb_location; CARD32 mc_agp_location; - unsigned char *MMIO; /* Map of MMIO region */ - unsigned char *FB; /* Map of frame buffer */ + void *MMIO; /* Map of MMIO region */ + void *FB; /* Map of frame buffer */ CARD8 *VBIOS; /* Video BIOS pointer */ Bool IsAtomBios; /* New BIOS used in R420 etc. */ diff --git a/src/radeon_accel.c b/src/radeon_accel.c index b739988..6028aff 100644 --- a/src/radeon_accel.c +++ b/src/radeon_accel.c @@ -621,7 +621,7 @@ RADEONHostDataParams(ScrnInfoPtr pScrn, CARD8 *dst, CARD32 pitch, int cpp, CARD32 *dstPitchOff, int *x, int *y) { RADEONInfoPtr info = RADEONPTR( pScrn ); - CARD32 dstOffs = dst - info->FB + info->fbLocation; + CARD32 dstOffs = dst - (CARD8*)info->FB + info->fbLocation; *dstPitchOff = pitch << 16 | (dstOffs & ~RADEON_BUFFER_ALIGN) >> 10; *y = ( dstOffs & RADEON_BUFFER_ALIGN ) / pitch; diff --git a/src/radeon_bios.c b/src/radeon_bios.c index cfa5d2b..d5b7f5e 100644 --- a/src/radeon_bios.c +++ b/src/radeon_bios.c @@ -48,7 +48,13 @@ Bool RADEONGetBIOSInfo(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) int tmp; unsigned short dptr; - if (!(info->VBIOS = xalloc(RADEON_VBIOS_SIZE))) { + if (!(info->VBIOS = xalloc( +#ifdef XSERVER_LIBPCIACCESS + info->PciInfo->rom_size +#else + RADEON_VBIOS_SIZE +#endif + ))) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Cannot allocate space for hold Video BIOS!\n"); return FALSE; @@ -58,6 +64,12 @@ Bool RADEONGetBIOSInfo(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) (void)memcpy(info->VBIOS, xf86int10Addr(pInt10, info->BIOSAddr), RADEON_VBIOS_SIZE); } else { +#ifdef XSERVER_LIBPCIACCESS + if (pci_device_read_rom(info->PciInfo, info->VBIOS)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Failed to read PCI ROM!\n"); + } +#else xf86ReadPciBIOS(0, info->PciTag, 0, info->VBIOS, RADEON_VBIOS_SIZE); if (info->VBIOS[0] != 0x55 || info->VBIOS[1] != 0xaa) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, @@ -69,6 +81,7 @@ Bool RADEONGetBIOSInfo(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) xf86ReadDomainMemory(info->PciTag, info->BIOSAddr, RADEON_VBIOS_SIZE, info->VBIOS); } +#endif } } diff --git a/src/radeon_dri.c b/src/radeon_dri.c index 24018e8..2c533b1 100644 --- a/src/radeon_dri.c +++ b/src/radeon_dri.c @@ -795,8 +795,8 @@ static Bool RADEONSetAgpMode(RADEONInfoPtr info, ScreenPtr pScreen) xf86DrvMsg(pScreen->myNum, X_INFO, "[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x]\n", mode, vendor, device, - info->PciInfo->vendor, - info->PciInfo->chipType); + PCI_DEV_VENDOR_ID(info->PciInfo), + PCI_DEV_DEVICE_ID(info->PciInfo)); if (drmAgpEnable(info->drmFD, mode) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] AGP not enabled\n"); @@ -1183,9 +1183,9 @@ static void RADEONDRIIrqInit(RADEONInfoPtr info, ScreenPtr pScreen) if (!info->irq) { info->irq = drmGetInterruptFromBusID( info->drmFD, - ((pciConfigPtr)info->PciInfo->thisCard)->busnum, - ((pciConfigPtr)info->PciInfo->thisCard)->devnum, - ((pciConfigPtr)info->PciInfo->thisCard)->funcnum); + PCI_CFG_BUS(info->PciInfo), + PCI_CFG_DEV(info->PciInfo), + PCI_CFG_FUNC(info->PciInfo)); if ((drmCtlInstHandler(info->drmFD, info->irq)) != 0) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, @@ -1291,9 +1291,9 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn) busId = xalloc(64); sprintf(busId, "PCI:%d:%d:%d", - info->PciInfo->bus, - info->PciInfo->device, - info->PciInfo->func); + PCI_DEV_BUS(info->PciInfo), + PCI_DEV_DEV(info->PciInfo), + PCI_DEV_FUNC(info->PciInfo)); } /* Low level DRM open */ @@ -1431,9 +1431,9 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen) pDRIInfo->busIdString = xalloc(64); sprintf(pDRIInfo->busIdString, "PCI:%d:%d:%d", - info->PciInfo->bus, - info->PciInfo->device, - info->PciInfo->func); + PCI_DEV_BUS(info->PciInfo), + PCI_DEV_DEV(info->PciInfo), + PCI_DEV_FUNC(info->PciInfo)); } pDRIInfo->ddxDriverMajorVersion = info->allowColorTiling ? RADEON_VERSION_MAJOR_TILED : RADEON_VERSION_MAJOR; diff --git a/src/radeon_driver.c b/src/radeon_driver.c index d434116..6f8a753 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -525,6 +525,8 @@ static Bool RADEONMapMMIO(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); +#ifndef XSERVER_LIBPCIACCESS + info->MMIO = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO | VIDMEM_READSIDEEFFECT, info->PciTag, @@ -532,6 +534,25 @@ static Bool RADEONMapMMIO(ScrnInfoPtr pScrn) info->MMIOSize); if (!info->MMIO) return FALSE; + +#else + + void** result = (void**)&info->MMIO; + int err = pci_device_map_range(info->PciInfo, + info->MMIOAddr, + info->MMIOSize, + PCI_DEV_MAP_FLAG_WRITABLE, + result); + + if (err) { + xf86DrvMsg (pScrn->scrnIndex, X_ERROR, + "Unable to map MMIO aperture. %s (%d)\n", + strerror (err), err); + return FALSE; + } + +#endif + return TRUE; } @@ -542,7 +563,11 @@ static Bool RADEONUnmapMMIO(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); +#ifndef XSERVER_LIBPCIACCESS xf86UnMapVidMem(pScrn->scrnIndex, info->MMIO, info->MMIOSize); +#else + pci_device_unmap_range(info->PciInfo, info->MMIO, info->MMIOSize); +#endif info->MMIO = NULL; return TRUE; @@ -555,6 +580,9 @@ static Bool RADEONMapFB(ScrnInfoPtr pScrn) xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "Map: 0x%08lx, 0x%08lx\n", info->LinearAddr, info->FbMapSize); + +#ifndef XSERVER_LIBPCIACCESS + info->FB = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER, info->PciTag, @@ -562,6 +590,25 @@ static Bool RADEONMapFB(ScrnInfoPtr pScrn) info->FbMapSize); if (!info->FB) return FALSE; + +#else + + int err = pci_device_map_range(info->PciInfo, + info->LinearAddr, + info->FbMapSize, + PCI_DEV_MAP_FLAG_WRITABLE | + PCI_DEV_MAP_FLAG_WRITE_COMBINE, + &info->FB); + + if (err) { + xf86DrvMsg (pScrn->scrnIndex, X_ERROR, + "Unable to map FB aperture. %s (%d)\n", + strerror (err), err); + return FALSE; + } + +#endif + return TRUE; } @@ -570,7 +617,12 @@ static Bool RADEONUnmapFB(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); +#ifndef XSERVER_LIBPCIACCESS xf86UnMapVidMem(pScrn->scrnIndex, info->FB, info->FbMapSize); +#else + pci_device_unmap_range(info->PciInfo, info->FB, info->FbMapSize); +#endif + info->FB = NULL; return TRUE; } @@ -1271,6 +1323,7 @@ static CARD32 RADEONGetAccessibleVRAM(ScrnInfoPtr pScrn) RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; CARD32 aper_size = INREG(RADEON_CONFIG_APER_SIZE) / 1024; + unsigned char byte; #ifdef XF86DRI /* If we use the DRI, we need to check if it's a version that has the @@ -1311,7 +1364,8 @@ static CARD32 RADEONGetAccessibleVRAM(ScrnInfoPtr pScrn) * check if it's a multifunction card by reading the PCI config * header type... Limit those to one aperture size */ - if (pciReadByte(info->PciTag, 0xe) & 0x80) { + PCI_READ_BYTE(info->PciInfo, &byte, 0xe); + if (byte & 0x80) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Generation 1 PCI interface in multifunction mode" ", accessible memory limited to one aperture\n"); @@ -1359,7 +1413,7 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn) accessible = RADEONGetAccessibleVRAM(pScrn); /* Crop it to the size of the PCI BAR */ - bar_size = (1ul << info->PciInfo->size[0]) / 1024; + bar_size = PCI_REGION_SIZE(info->PciInfo, 0) / 1024; if (bar_size == 0) bar_size = 0x20000; if (accessible > bar_size) @@ -1419,6 +1473,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) MessageType from = X_PROBED; #ifdef XF86DRI const char *s; + uint32_t cmd_stat; #endif /* Chipset */ @@ -1430,7 +1485,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) info->Chipset = dev->chipID; from = X_CONFIG; } else { - info->Chipset = info->PciInfo->chipType; + info->Chipset = PCI_DEV_DEVICE_ID(info->PciInfo); } pScrn->chipset = (char *)xf86TokenToString(RADEONChipsets, info->Chipset); @@ -1470,17 +1525,17 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) info->ChipFamily = CHIP_FAMILY_RV100; /* DELL triple-head configuration. */ - if ((info->PciInfo->subsysVendor == PCI_VENDOR_DELL) && - ((info->PciInfo->subsysCard == 0x016c) || - (info->PciInfo->subsysCard == 0x016d) || - (info->PciInfo->subsysCard == 0x016e) || - (info->PciInfo->subsysCard == 0x016f) || - (info->PciInfo->subsysCard == 0x0170) || - (info->PciInfo->subsysCard == 0x017d) || - (info->PciInfo->subsysCard == 0x017e) || - (info->PciInfo->subsysCard == 0x0183) || - (info->PciInfo->subsysCard == 0x018a) || - (info->PciInfo->subsysCard == 0x019a))) { + if ((PCI_SUB_VENDOR_ID(info->PciInfo) == PCI_VENDOR_DELL) && + ((PCI_SUB_DEVICE_ID(info->PciInfo) == 0x016c) || + (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x016d) || + (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x016e) || + (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x016f) || + (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x0170) || + (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x017d) || + (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x017e) || + (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x0183) || + (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x018a) || + (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x019a))) { info->IsDellServer = TRUE; xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DELL server detected, force to special setup\n"); } @@ -1702,7 +1757,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) from = X_PROBED; - info->LinearAddr = info->PciInfo->memBase[0] & 0xfe000000; + info->LinearAddr = PCI_REGION_BASE(info->PciInfo, 0, REGION_MEM) & 0xfe000000; pScrn->memPhysBase = info->LinearAddr; if (dev->MemBase) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, @@ -1719,6 +1774,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%08lx\n", info->LinearAddr); +#ifndef XSERVER_LIBPCIACCESS /* BIOS */ from = X_PROBED; info->BIOSAddr = info->PciInfo->biosBase & 0xfffe0000; @@ -1734,6 +1790,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) xf86DrvMsg(pScrn->scrnIndex, from, "BIOS at 0x%08lx\n", info->BIOSAddr); } +#endif /* Read registers used to determine options */ /* Check chip errata */ @@ -1796,15 +1853,15 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) info->cardType = CARD_PCI; - if (pciReadLong(info->PciTag, PCI_CMD_STAT_REG) & RADEON_CAP_LIST) { - CARD32 cap_ptr, cap_id; - - cap_ptr = pciReadLong(info->PciTag, - RADEON_CAPABILITIES_PTR_PCI_CONFIG) - & RADEON_CAP_PTR_MASK; + PCI_READ_LONG(info->PciInfo, &cmd_stat, PCI_CMD_STAT_REG); + if (cmd_stat & RADEON_CAP_LIST) { + uint32_t cap_ptr, cap_id; + + PCI_READ_LONG(info->PciInfo, &cap_ptr, RADEON_CAPABILITIES_PTR_PCI_CONFIG); + cap_ptr &= RADEON_CAP_PTR_MASK; while(cap_ptr != RADEON_CAP_ID_NULL) { - cap_id = pciReadLong(info->PciTag, cap_ptr); + PCI_READ_LONG(info->PciInfo, &cap_id, cap_ptr); if ((cap_id & 0xff)== RADEON_CAP_ID_AGP) { info->cardType = CARD_AGP; break; @@ -1991,7 +2048,7 @@ static Bool RADEONPreInitInt10(ScrnInfoPtr pScrn, xf86Int10InfoPtr *ppInt10) /* The VGA BIOS on the RV100/QY cannot be read when the digital output * is enabled. Clear and restore FP2_ON around int10 to avoid this. */ - if (info->PciInfo->chipType == PCI_CHIP_RV100_QY) { + if (PCI_DEV_DEVICE_ID(info->PciInfo) == PCI_CHIP_RV100_QY) { fp2_gen_ctl_save = INREG(RADEON_FP2_GEN_CNTL); if (fp2_gen_ctl_save & RADEON_FP2_ON) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "disabling digital out\n"); @@ -2527,11 +2584,11 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) if (info->pEnt->location.type != BUS_PCI) goto fail; info->PciInfo = xf86GetPciInfoForEntity(info->pEnt->index); - info->PciTag = pciTag(info->PciInfo->bus, - info->PciInfo->device, - info->PciInfo->func); - info->MMIOAddr = info->PciInfo->memBase[2] & 0xffffff00; - info->MMIOSize = (1 << info->PciInfo->size[2]); + info->PciTag = pciTag(PCI_DEV_BUS(info->PciInfo), + PCI_DEV_DEV(info->PciInfo), + PCI_DEV_FUNC(info->PciInfo)); + info->MMIOAddr = PCI_REGION_BASE(info->PciInfo, 2, REGION_MEM) & 0xffffff00; + info->MMIOSize = PCI_REGION_SIZE(info->PciInfo, 2); if (info->pEnt->device->IOBase) { xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "MMIO address override, using 0x%08lx instead of 0x%08lx\n", @@ -2552,7 +2609,10 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) } #if !defined(__alpha__) - if (xf86GetPciDomain(info->PciTag) || + if ( +#ifndef XSERVER_LIBPCIACCESS + xf86GetPciDomain(info->PciTag) || +#endif !xf86IsPrimaryPci(info->PciInfo)) RADEONPreInt10Save(pScrn, &int10_save); #else @@ -2574,9 +2634,9 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) xf86DrvMsg(pScrn->scrnIndex, X_INFO, "PCI bus %d card %d func %d\n", - info->PciInfo->bus, - info->PciInfo->device, - info->PciInfo->func); + PCI_DEV_BUS(info->PciInfo), + PCI_DEV_DEV(info->PciInfo), + PCI_DEV_FUNC(info->PciInfo)); if (xf86RegisterResources(info->pEnt->index, 0, ResExclusive)) goto fail; diff --git a/src/radeon_video.c b/src/radeon_video.c index dca9695..26857a5 100644 --- a/src/radeon_video.c +++ b/src/radeon_video.c @@ -1213,9 +1213,11 @@ RADEONResetVideo(ScrnInfoPtr pScrn) xvAdjustment = MAKE_ATOM("XV_DEBUG_ADJUSTMENT"); - sprintf(tmp, "RXXX:%d.%d.%d", info->PciInfo->vendor, info->PciInfo->chipType, info->PciInfo->chipRev); + sprintf(tmp, "RXXX:%d.%d.%d", PCI_DEV_VENDOR_ID(info->PciInfo), + PCI_DEV_DEVICE_ID(info->PciInfo), PCI_DEV_REVISION(info->PciInfo)); pPriv->device_id = MAKE_ATOM(tmp); - sprintf(tmp, "PCI:%02d:%02d.%d", info->PciInfo->bus, info->PciInfo->device, info->PciInfo->func); + sprintf(tmp, "PCI:%02d:%02d.%d", PCI_DEV_BUS(info->PciInfo), + PCI_DEV_DEV(info->PciInfo), PCI_DEV_FUNC(info->PciInfo)); pPriv->location_id = MAKE_ATOM(tmp); sprintf(tmp, "INSTANCE:%d", pScrn->scrnIndex); pPriv->instance_id = MAKE_ATOM(tmp); commit 3a958ba136c3fae5a4ddd56373ac7cd47046f10e Author: Alex Deucher <[EMAIL PROTECTED](none)> Date: Wed Oct 3 22:59:14 2007 -0400 RADEON: remove some cruft diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 831c96b..d434116 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -5317,15 +5317,6 @@ void RADEONRestore(ScrnInfoPtr pScrn) OUTREG(RADEON_GRPH_BUFFER_CNTL, restore->grph_buffer_cntl); OUTREG(RADEON_GRPH2_BUFFER_CNTL, restore->grph2_buffer_cntl); -#if 0 - /* M6 card has trouble restoring text mode for its CRT. - * This is fixed elsewhere and will be removed in the future. - */ - if ((xf86IsEntityShared(info->pEnt->index) || info->MergedFB) - && info->IsM6) - OUTREG(RADEON_DAC_CNTL2, restore->dac2_cntl); -#endif - RADEONRestoreMemMapRegisters(pScrn, restore); RADEONRestoreCommonRegisters(pScrn, restore); commit b6bda79f72df5e5bf9c6b71fa3298e765da506bd Author: Alex Deucher <[EMAIL PROTECTED](none)> Date: Wed Oct 3 22:56:27 2007 -0400 RADEON: more fixes for single crtc chips diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 6668a81..831c96b 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -5243,6 +5243,7 @@ static void RADEONSavePalette(ScrnInfoPtr pScrn, RADEONSavePtr save) static void RADEONSave(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); + RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); unsigned char *RADEONMMIO = info->MMIO; RADEONSavePtr save = &info->SavedReg; @@ -5279,8 +5280,10 @@ static void RADEONSave(ScrnInfoPtr pScrn) RADEONSaveCrtcRegisters(pScrn, save); RADEONSaveFPRegisters(pScrn, save); RADEONSaveDACRegisters(pScrn, save); - RADEONSaveCrtc2Registers(pScrn, save); - RADEONSavePLL2Registers(pScrn, save); + if (pRADEONEnt->HasCRTC2) { + RADEONSaveCrtc2Registers(pScrn, save); + RADEONSavePLL2Registers(pScrn, save); + } if (info->InternalTVOut) RADEONSaveTVRegisters(pScrn, save); @@ -5369,9 +5372,11 @@ void RADEONRestore(ScrnInfoPtr pScrn) #endif /* need to make sure we don't enable a crtc by accident or we may get a hang */ - if (info->crtc2_on) { - crtc = xf86_config->crtc[1]; - crtc->funcs->dpms(crtc, DPMSModeOn); + if (pRADEONEnt->HasCRTC2) { + if (info->crtc2_on) { + crtc = xf86_config->crtc[1]; + crtc->funcs->dpms(crtc, DPMSModeOn); + } } if (info->crtc_on) { crtc = xf86_config->crtc[0]; commit 5f5c4e6ad61c45c24f1443b91b4bc5375efdebc0 Author: Alex Deucher <[EMAIL PROTECTED](none)> Date: Wed Oct 3 22:46:21 2007 -0400 RADEON: remove RADEONSaveMode() It's only called by RADEONSave(), so just move its contents into RADEONSave(). this mirrors RADEONRestore(). diff --git a/src/radeon_driver.c b/src/radeon_driver.c index b7e2684..6668a81 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -5239,30 +5239,6 @@ static void RADEONSavePalette(ScrnInfoPtr pScrn, RADEONSavePtr save) } #endif -/* Save state that defines current video mode */ -static void RADEONSaveMode(ScrnInfoPtr pScrn, RADEONSavePtr save) -{ - RADEONInfoPtr info = RADEONPTR(pScrn); - - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, - "RADEONSaveMode(%p)\n", save); - - RADEONSaveMemMapRegisters(pScrn, save); - RADEONSaveCommonRegisters(pScrn, save); - RADEONSavePLLRegisters(pScrn, save); - RADEONSaveCrtcRegisters(pScrn, save); - RADEONSaveFPRegisters(pScrn, save); - RADEONSaveDACRegisters(pScrn, save); - RADEONSaveCrtc2Registers(pScrn, save); - RADEONSavePLL2Registers(pScrn, save); - if (info->InternalTVOut) - RADEONSaveTVRegisters(pScrn, save); - /*RADEONSavePalette(pScrn, save);*/ - - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, - "RADEONSaveMode returns %p\n", save); -} - /* Save everything needed to restore the original VC state */ static void RADEONSave(ScrnInfoPtr pScrn) { @@ -5297,7 +5273,17 @@ static void RADEONSave(ScrnInfoPtr pScrn) save->clock_cntl_index = INREG(RADEON_CLOCK_CNTL_INDEX); RADEONPllErrataAfterIndex(info); - RADEONSaveMode(pScrn, save); + RADEONSaveMemMapRegisters(pScrn, save); + RADEONSaveCommonRegisters(pScrn, save); + RADEONSavePLLRegisters(pScrn, save); + RADEONSaveCrtcRegisters(pScrn, save); + RADEONSaveFPRegisters(pScrn, save); + RADEONSaveDACRegisters(pScrn, save); + RADEONSaveCrtc2Registers(pScrn, save); + RADEONSavePLL2Registers(pScrn, save); + if (info->InternalTVOut) + RADEONSaveTVRegisters(pScrn, save); + RADEONSaveSurfaces(pScrn, save); } commit bfede412b3a3cd11769a580b167c528734146096 Author: Alex Deucher <[EMAIL PROTECTED](none)> Date: Wed Oct 3 22:19:16 2007 -0400 RADEON: minor fixes for external TMDS diff --git a/src/radeon_output.c b/src/radeon_output.c index 3f8b772..a6da78e 100644 --- a/src/radeon_output.c +++ b/src/radeon_output.c @@ -865,13 +865,15 @@ static void RADEONInitFP2Registers(xf86OutputPtr output, RADEONSavePtr save, RADEON_FP2_DVO_EN | RADEON_FP2_DVO_RATE_SEL_SDR); -#if 0 - /* XXX: these may be chip specific */ - save->fp2_gen_cntl |= (1 << 22) | R200_FP2_DVO_CLOCK_MODE_SINGLE; - if (mode->Clock > 165000) - save->fp2_gen_cntl |= R200_FP2_DVO_DUAL_CHANNEL_EN; + /* XXX: these may be oem specific */ + if (IS_R300_VARIANT) { + save->fp2_gen_cntl |= RADEON_FP2_PAD_FLOP_EN | R300_FP2_DVO_CLOCK_MODE_SINGLE; +#if 0 + if (mode->Clock > 165000) + save->fp2_gen_cntl |= R300_FP2_DVO_DUAL_CHANNEL_EN; #endif + } if (IsPrimary) { if ((info->ChipFamily == CHIP_FAMILY_R200) || IS_R300_VARIANT) { diff --git a/src/radeon_reg.h b/src/radeon_reg.h index 96adb22..2653339 100644 --- a/src/radeon_reg.h +++ b/src/radeon_reg.h @@ -780,7 +780,7 @@ # define RADEON_FP2_PANEL_FORMAT (1 << 3) # define RADEON_FP2_DETECT_SENSE (1 << 8) # define R200_FP2_SOURCE_SEL_MASK (3 << 10) -# define R200_FP2_SOURCE_SEL_CRTC1 (0 << 10) +# define R200_FP2_SOURCE_SEL_CRTC1 (0 << 10) # define R200_FP2_SOURCE_SEL_CRTC2 (1 << 10) # define R200_FP2_SOURCE_SEL_RMX (2 << 10) # define R200_FP2_SOURCE_SEL_TRANS_UNIT (3 << 10) @@ -796,6 +796,8 @@ # define RADEON_FP2_DVO_EN (1 << 25) # define RADEON_FP2_DVO_RATE_SEL_SDR (1 << 26) # define R200_FP2_DVO_RATE_SEL_SDR (1 << 27) +# define R300_FP2_DVO_CLOCK_MODE_SINGLE (1 << 28) +# define R300_FP2_DVO_DUAL_CHANNEL_EN (1 << 29) #define RADEON_FP_H_SYNC_STRT_WID 0x02c4 #define RADEON_FP_H2_SYNC_STRT_WID 0x03c4 #define RADEON_FP_HORZ_STRETCH 0x028c commit 597dffce9bdc200003d0be880235258386a0bdd7 Author: Alex Deucher <[EMAIL PROTECTED](none)> Date: Wed Oct 3 21:43:08 2007 -0400 RADEON: final fix for RMX/LVDS It seems that on quite a few laptops the LVDS H/V timing from the bios tables are way off or just doesn't work period. Either we are using it wrong or we need some additional checks when we parse it. Only the dot clock seems to really matter, so use cvt modes and update the dotclock. This seems to work correctly in all cases. diff --git a/src/radeon_output.c b/src/radeon_output.c index 27c6928..3f8b772 100644 --- a/src/radeon_output.c +++ b/src/radeon_output.c @@ -750,6 +750,8 @@ radeon_mode_fixup(xf86OutputPtr output, DisplayModePtr mode, { RADEONOutputPrivatePtr radeon_output = output->driver_private; + radeon_output->Flags &= ~RADEON_USE_RMX; + /* decide if we are using RMX */ if ((radeon_output->MonType == MT_LCD || radeon_output->MonType == MT_DFP) && radeon_output->rmx_type != RMX_OFF) { @@ -760,20 +762,13 @@ radeon_mode_fixup(xf86OutputPtr output, DisplayModePtr mode, if (mode->HDisplay < radeon_output->PanelXRes || mode->VDisplay < radeon_output->PanelYRes) radeon_output->Flags |= RADEON_USE_RMX; - } else - radeon_output->Flags &= ~RADEON_USE_RMX; + } } - /* update crtc timing for LVDS always and DFP if RMX is active */ + /* update clock for LVDS always and DFP if RMX is active */ if ((radeon_output->MonType == MT_LCD) || ((radeon_output->MonType == MT_DFP) && (radeon_output->Flags & RADEON_USE_RMX))) { - adjusted_mode->CrtcHTotal = mode->CrtcHDisplay + radeon_output->HBlank; - adjusted_mode->CrtcHSyncStart = mode->CrtcHDisplay + radeon_output->HOverPlus; - adjusted_mode->CrtcHSyncEnd = mode->CrtcHSyncStart + radeon_output->HSyncWidth; - adjusted_mode->CrtcVTotal = mode->CrtcVDisplay + radeon_output->VBlank; - adjusted_mode->CrtcVSyncStart = mode->CrtcVDisplay + radeon_output->VOverPlus; - adjusted_mode->CrtcVSyncEnd = mode->CrtcVSyncStart + radeon_output->VSyncWidth; adjusted_mode->Clock = radeon_output->DotClock; adjusted_mode->Flags = radeon_output->Flags; } commit cc0c2d8e61600652b1f9cb3dc49db2ef62b1e40d Author: Alex Deucher <[EMAIL PROTECTED]> Date: Wed Oct 3 00:59:37 2007 -0400 RADEON: Finally sort out LVDS modes - The panel timing from the bios tables is for the crtc, not the native panel mode, so add cvt modes for the panel and fix up the crtc values in mode_fixup(). - rename and reconfigure RADEONValidateFPModes() to what it really does: add screen modes. I suppose for backwards compatibility we ought to add the screen modes to every reasonable output, but everyone should really use xrandr or an output monitor section to add custom modes. Hopefully this will go away at some point. diff --git a/src/radeon.h b/src/radeon.h index 288fe00..610e2b3 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -940,7 +940,6 @@ extern Bool RADEONAllocateConnectors(ScrnInfoPtr pScrn); extern int RADEONValidateMergeModes(ScrnInfoPtr pScrn); extern int RADEONValidateDDCModes(ScrnInfoPtr pScrn1, char **ppModeName, RADEONMonitorType DisplayType, int crtc2); -extern int RADEONValidateFPModes(xf86OutputPtr output, char **ppModeName, DisplayModePtr *modeList); extern void RADEONSetPitch (ScrnInfoPtr pScrn); extern void RADEONUpdateHVPosition(xf86OutputPtr output, DisplayModePtr mode); diff --git a/src/radeon_modes.c b/src/radeon_modes.c index 453f4a8..ea2c229 100644 -- To UNSUBSCRIBE, email to [EMAIL PROTECTED] with a subject of "unsubscribe". Trouble? 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