The branch stable/13 has been updated by kbowling (ports committer):

URL: 
https://cgit.FreeBSD.org/src/commit/?id=5dd1d72e5b3bbdcfdc70facc940f42cd036ad626

commit 5dd1d72e5b3bbdcfdc70facc940f42cd036ad626
Author:     Marius Strobl <mar...@freebsd.org>
AuthorDate: 2021-01-27 14:28:25 +0000
Commit:     Kevin Bowling <kbowl...@freebsd.org>
CommitDate: 2021-08-17 01:31:43 +0000

    e1000: fix build after b761f264926a (orig c1655b0f)
    
    (cherry picked from commit c262e8e87e7b59b768c717c1779ef1ba28507f44)
---
 sys/dev/e1000/if_em.c | 86 +++++++++++++++++++++++++--------------------------
 1 file changed, 43 insertions(+), 43 deletions(-)

diff --git a/sys/dev/e1000/if_em.c b/sys/dev/e1000/if_em.c
index b2d563dbe796..52d20e57519a 100644
--- a/sys/dev/e1000/if_em.c
+++ b/sys/dev/e1000/if_em.c
@@ -837,7 +837,7 @@ em_if_attach_pre(if_ctx_t ctx)
                device_printf(dev, "attach_pre capping queues at %d\n",
                    scctx->isc_ntxqsets_max);
 
-       if (hw.mac.type >= igb_mac_min) {
+       if (hw->mac.type >= igb_mac_min) {
                scctx->isc_txqsizes[0] = roundup2(scctx->isc_ntxd[0] * 
sizeof(union e1000_adv_tx_desc), EM_DBA_ALIGN);
                scctx->isc_rxqsizes[0] = roundup2(scctx->isc_nrxd[0] * 
sizeof(union e1000_adv_rx_desc), EM_DBA_ALIGN);
                scctx->isc_txd_size[0] = sizeof(union e1000_adv_tx_desc);
@@ -849,7 +849,7 @@ em_if_attach_pre(if_ctx_t ctx)
                scctx->isc_capabilities = scctx->isc_capenable = IGB_CAPS;
                scctx->isc_tx_csum_flags = CSUM_TCP | CSUM_UDP | CSUM_TSO |
                     CSUM_IP6_TCP | CSUM_IP6_UDP;
-               if (hw.mac.type != e1000_82575)
+               if (hw->mac.type != e1000_82575)
                        scctx->isc_tx_csum_flags |= CSUM_SCTP | CSUM_IP6_SCTP;
                /*
                ** Some new devices, as with ixgbe, now may
@@ -857,7 +857,7 @@ em_if_attach_pre(if_ctx_t ctx)
                ** track of which is used.
                */
                scctx->isc_msix_bar = pci_msix_table_bar(dev);
-       } else if (hw.mac.type >= em_mac_min) {
+       } else if (hw->mac.type >= em_mac_min) {
                scctx->isc_txqsizes[0] = roundup2(scctx->isc_ntxd[0]* 
sizeof(struct e1000_tx_desc), EM_DBA_ALIGN);
                scctx->isc_rxqsizes[0] = roundup2(scctx->isc_nrxd[0] * 
sizeof(union e1000_rx_desc_extended), EM_DBA_ALIGN);
                scctx->isc_txd_size[0] = sizeof(struct e1000_tx_desc);
@@ -889,7 +889,7 @@ em_if_attach_pre(if_ctx_t ctx)
                 * We support MSI-X with 82574 only, but indicate to iflib(4)
                 * that it shall give MSI at least a try with other devices.
                 */
-               if (hw.mac.type == e1000_82574) {
+               if (hw->mac.type == e1000_82574) {
                        scctx->isc_msix_bar = pci_msix_table_bar(dev);;
                } else {
                        scctx->isc_msix_bar = -1;
@@ -903,7 +903,7 @@ em_if_attach_pre(if_ctx_t ctx)
                scctx->isc_tx_csum_flags = CSUM_TCP | CSUM_UDP;
                scctx->isc_txrx = &lem_txrx;
                scctx->isc_capabilities = scctx->isc_capenable = LEM_CAPS;
-               if (hw.mac.type < e1000_82543)
+               if (hw->mac.type < e1000_82543)
                        scctx->isc_capenable &= 
~(IFCAP_HWCSUM|IFCAP_VLAN_HWCSUM);
                /* INTx only */
                scctx->isc_msix_bar = 0;
@@ -996,7 +996,7 @@ em_if_attach_pre(if_ctx_t ctx)
        hw->phy.autoneg_wait_to_complete = FALSE;
        hw->phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 
-       if (hw.mac.type < em_mac_min) {
+       if (hw->mac.type < em_mac_min) {
                e1000_init_script_state_82541(hw, TRUE);
                e1000_set_tbi_compatibility_82543(hw, TRUE);
        }
@@ -1011,7 +1011,7 @@ em_if_attach_pre(if_ctx_t ctx)
         * Set the frame limits assuming
         * standard ethernet sized frames.
         */
-       scctx->isc_max_frame_size = hw.mac.max_frame_size =
+       scctx->isc_max_frame_size = hw->mac.max_frame_size =
            ETHERMTU + ETHER_HDR_LEN + ETHERNET_FCS_SIZE;
 
        /*
@@ -1808,7 +1808,7 @@ em_if_update_admin_status(if_ctx_t ctx)
                break;
        case e1000_media_type_internal_serdes:
                e1000_check_for_link(hw);
-               link_check = hw.mac.serdes_has_link;
+               link_check = hw->mac.serdes_has_link;
                break;
        /* VF device is type_unknown */
        case e1000_media_type_unknown:
@@ -1856,7 +1856,7 @@ em_if_update_admin_status(if_ctx_t ctx)
                        msec_delay(I210_LINK_DELAY);
                /* Reset if the media type changed. */
                if (hw->dev_spec._82575.media_changed &&
-                   hw.mac.type >= igb_mac_min) {
+                   hw->mac.type >= igb_mac_min) {
                        hw->dev_spec._82575.media_changed = false;
                        adapter->flags |= IGB_MEDIA_RESET;
                        em_reset(ctx);
@@ -2117,13 +2117,13 @@ igb_configure_queues(struct adapter *adapter)
        u32 tmp, ivar = 0, newitr = 0;
 
        /* First turn on RSS capability */
-       if (hw.mac.type != e1000_82575)
+       if (hw->mac.type != e1000_82575)
                E1000_WRITE_REG(hw, E1000_GPIE,
                    E1000_GPIE_MSIX_MODE | E1000_GPIE_EIAME |
                    E1000_GPIE_PBA | E1000_GPIE_NSICR);
 
        /* Turn on MSI-X */
-       switch (hw.mac.type) {
+       switch (hw->mac.type) {
        case e1000_82580:
        case e1000_i350:
        case e1000_i354:
@@ -2531,7 +2531,7 @@ em_reset(if_ctx_t ctx)
        case e1000_ich9lan:
        case e1000_ich10lan:
                /* Boost Receive side for jumbo frames */
-               if (hw.mac.max_frame_size > 4096)
+               if (hw->mac.max_frame_size > 4096)
                        pba = E1000_PBA_14K;
                else
                        pba = E1000_PBA_10K;
@@ -2579,11 +2579,11 @@ em_reset(if_ctx_t ctx)
                pba = E1000_READ_REG(hw, E1000_PBA);
                tx_space = pba >> 16;
                pba &= 0xffff;
-               min_tx = (hw.mac.max_frame_size +
+               min_tx = (hw->mac.max_frame_size +
                    sizeof(struct e1000_tx_desc) - ETHERNET_FCS_SIZE) * 2;
                min_tx = roundup2(min_tx, 1024);
                min_tx >>= 10;
-               min_rx = hw.mac.max_frame_size;
+               min_rx = hw->mac.max_frame_size;
                min_rx = roundup2(min_rx, 1024);
                min_rx >>= 10;
                if (tx_space < min_tx &&
@@ -2620,7 +2620,7 @@ em_reset(if_ctx_t ctx)
         */
        rx_buffer_size = (pba & 0xffff) << 10;
        hw->fc.high_water = rx_buffer_size -
-           roundup2(hw.mac.max_frame_size, 1024);
+           roundup2(hw->mac.max_frame_size, 1024);
        hw->fc.low_water = hw->fc.high_water - 1500;
 
        if (adapter->fc) /* locally set flow control value? */
@@ -2698,7 +2698,7 @@ em_reset(if_ctx_t ctx)
 
        /* Issue a global reset */
        e1000_reset_hw(hw);
-       if (hw.mac.type >= igb_mac_min) {
+       if (hw->mac.type >= igb_mac_min) {
                E1000_WRITE_REG(hw, E1000_WUC, 0);
        } else {
                E1000_WRITE_REG(hw, E1000_WUFC, 0);
@@ -2714,7 +2714,7 @@ em_reset(if_ctx_t ctx)
                device_printf(dev, "Hardware Initialization Failed\n");
                return;
        }
-       if (hw.mac.type >= igb_mac_min)
+       if (hw->mac.type >= igb_mac_min)
                igb_init_dmac(adapter, pba);
 
        E1000_WRITE_REG(hw, E1000_VET, ETHERTYPE_VLAN);
@@ -2779,7 +2779,7 @@ igb_initialize_rss_mapping(struct adapter *adapter)
        u32 rss_key[10], mrqc, shift = 0;
 
        /* XXX? */
-       if (hw.mac.type == e1000_82575)
+       if (hw->mac.type == e1000_82575)
                shift = 6;
 
        /*
@@ -2888,11 +2888,11 @@ em_setup_interface(if_ctx_t ctx)
         * Specify the media types supported by this adapter and register
         * callbacks to update media and link information
         */
-       if (hw.phy.media_type == e1000_media_type_fiber ||
-           hw.phy.media_type == e1000_media_type_internal_serdes) {
+       if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
+           adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
                u_char fiber_type = IFM_1000_SX;        /* default type */
 
-               if (hw.mac.type == e1000_82545)
+               if (adapter->hw.mac.type == e1000_82545)
                        fiber_type = IFM_1000_LX;
                ifmedia_add(adapter->media, IFM_ETHER | fiber_type | IFM_FDX, 
0, NULL);
                ifmedia_add(adapter->media, IFM_ETHER | fiber_type, 0, NULL);
@@ -2901,7 +2901,7 @@ em_setup_interface(if_ctx_t ctx)
                ifmedia_add(adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX, 0, 
NULL);
                ifmedia_add(adapter->media, IFM_ETHER | IFM_100_TX, 0, NULL);
                ifmedia_add(adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX, 
0, NULL);
-               if (hw.phy.type != e1000_phy_ife) {
+               if (adapter->hw.phy.type != e1000_phy_ife) {
                        ifmedia_add(adapter->media, IFM_ETHER | IFM_1000_T | 
IFM_FDX, 0, NULL);
                        ifmedia_add(adapter->media, IFM_ETHER | IFM_1000_T, 0, 
NULL);
                }
@@ -3085,7 +3085,7 @@ em_initialize_transmit_unit(if_ctx_t ctx)
        }
 
        /* Set the default values for the Tx Inter Packet Gap timer */
-       switch (hw.mac.type) {
+       switch (hw->mac.type) {
        case e1000_80003es2lan:
                tipg = DEFAULT_82543_TIPG_IPGR1;
                tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
@@ -3097,8 +3097,8 @@ em_initialize_transmit_unit(if_ctx_t ctx)
                tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
                break;
        default:
-               if (hw.phy.media_type == e1000_media_type_fiber ||
-                   hw.phy.media_type == e1000_media_type_internal_serdes)
+               if (hw->phy.media_type == e1000_media_type_fiber ||
+                   hw->phy.media_type == e1000_media_type_internal_serdes)
                        tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
                else
                        tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
@@ -3109,15 +3109,15 @@ em_initialize_transmit_unit(if_ctx_t ctx)
        E1000_WRITE_REG(hw, E1000_TIPG, tipg);
        E1000_WRITE_REG(hw, E1000_TIDV, adapter->tx_int_delay.value);
 
-       if(hw.mac.type >= e1000_82540)
+       if(hw->mac.type >= e1000_82540)
                E1000_WRITE_REG(hw, E1000_TADV,
                    adapter->tx_abs_int_delay.value);
 
-       if (hw.mac.type == e1000_82571 || hw.mac.type == e1000_82572) {
+       if (hw->mac.type == e1000_82571 || hw->mac.type == e1000_82572) {
                tarc = E1000_READ_REG(hw, E1000_TARC(0));
                tarc |= TARC_SPEED_MODE_BIT;
                E1000_WRITE_REG(hw, E1000_TARC(0), tarc);
-       } else if (hw.mac.type == e1000_80003es2lan) {
+       } else if (hw->mac.type == e1000_80003es2lan) {
                /* errata: program both queues to unweighted RR */
                tarc = E1000_READ_REG(hw, E1000_TARC(0));
                tarc |= 1;
@@ -3125,7 +3125,7 @@ em_initialize_transmit_unit(if_ctx_t ctx)
                tarc = E1000_READ_REG(hw, E1000_TARC(1));
                tarc |= 1;
                E1000_WRITE_REG(hw, E1000_TARC(1), tarc);
-       } else if (hw.mac.type == e1000_82574) {
+       } else if (hw->mac.type == e1000_82574) {
                tarc = E1000_READ_REG(hw, E1000_TARC(0));
                tarc |= TARC_ERRATA_BIT;
                if ( adapter->tx_num_queues > 1) {
@@ -3145,7 +3145,7 @@ em_initialize_transmit_unit(if_ctx_t ctx)
        tctl |= (E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
                   (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT));
 
-       if (hw.mac.type >= e1000_82571)
+       if (hw->mac.type >= e1000_82571)
                tctl |= E1000_TCTL_MULR;
 
        /* This write will effectively turn on the transmit unit. */
@@ -3212,7 +3212,7 @@ em_initialize_receive_unit(if_ctx_t ctx)
        if (!em_disable_crc_stripping)
                rctl |= E1000_RCTL_SECRC;
 
-       if (hw.mac.type >= e1000_82540) {
+       if (hw->mac.type >= e1000_82540) {
                E1000_WRITE_REG(hw, E1000_RADV,
                    adapter->rx_abs_int_delay.value);
 
@@ -3242,9 +3242,9 @@ em_initialize_receive_unit(if_ctx_t ctx)
 
        rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
        if (if_getcapenable(ifp) & IFCAP_RXCSUM &&
-           hw.mac.type >= e1000_82543) {
+           hw->mac.type >= e1000_82543) {
                if (adapter->tx_num_queues > 1) {
-                       if (hw.mac.type >= igb_mac_min) {
+                       if (hw->mac.type >= igb_mac_min) {
                                rxcsum |= E1000_RXCSUM_PCSD;
                                if (hw->mac.type != e1000_82575)
                                        rxcsum |= E1000_RXCSUM_CRCOFL;
@@ -3253,11 +3253,11 @@ em_initialize_receive_unit(if_ctx_t ctx)
                                        E1000_RXCSUM_IPOFL |
                                        E1000_RXCSUM_PCSD;
                } else {
-                       if (hw.mac.type >= igb_mac_min)
+                       if (hw->mac.type >= igb_mac_min)
                                rxcsum |= E1000_RXCSUM_IPPCSE;
                        else
                                rxcsum |= E1000_RXCSUM_TUOFL | 
E1000_RXCSUM_IPOFL;
-                       if (hw.mac.type > e1000_82575)
+                       if (hw->mac.type > e1000_82575)
                                rxcsum |= E1000_RXCSUM_CRCOFL;
                }
        } else
@@ -3266,7 +3266,7 @@ em_initialize_receive_unit(if_ctx_t ctx)
        E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
 
        if (adapter->rx_num_queues > 1) {
-               if (hw.mac.type >= igb_mac_min)
+               if (hw->mac.type >= igb_mac_min)
                        igb_initialize_rss_mapping(adapter);
                else
                        em_initialize_rss_mapping(adapter);
@@ -3306,11 +3306,11 @@ em_initialize_receive_unit(if_ctx_t ctx)
         * Only write to RXDCTL(1) if there is a need for different
         * settings.
         */
-       if ((hw.mac.type == e1000_ich9lan || hw.mac.type == e1000_pch2lan ||
-           hw.mac.type == e1000_ich10lan) && (if_getmtu(ifp) > ETHERMTU)) {
+       if ((hw->mac.type == e1000_ich9lan || hw->mac.type == e1000_pch2lan ||
+           hw->mac.type == e1000_ich10lan) && if_getmtu(ifp) > ETHERMTU) {
                u32 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(0));
                E1000_WRITE_REG(hw, E1000_RXDCTL(0), rxdctl | 3);
-       } else if (hw.mac.type == e1000_82574) {
+       } else if (hw->mac.type == e1000_82574) {
                for (int i = 0; i < adapter->rx_num_queues; i++) {
                        u32 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(i));
                        rxdctl |= 0x20; /* PTHRESH */
@@ -3319,7 +3319,7 @@ em_initialize_receive_unit(if_ctx_t ctx)
                        rxdctl |= 1 << 24; /* Switch to granularity */
                        E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl);
                }
-       } else if (hw.mac.type >= igb_mac_min) {
+       } else if (hw->mac.type >= igb_mac_min) {
                u32 psize, srrctl = 0;
 
                if (if_getmtu(ifp) > ETHERMTU) {
@@ -3381,7 +3381,7 @@ em_initialize_receive_unit(if_ctx_t ctx)
                        rxdctl |= IGB_RX_WTHRESH << 16;
                        E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl);
                }               
-       } else if (hw.mac.type >= e1000_pch2lan) {
+       } else if (hw->mac.type >= e1000_pch2lan) {
                if (if_getmtu(ifp) > ETHERMTU)
                        e1000_lv_jumbo_workaround_ich8lan(hw, TRUE);
                else
@@ -3391,7 +3391,7 @@ em_initialize_receive_unit(if_ctx_t ctx)
        /* Make sure VLAN Filters are off */
        rctl &= ~E1000_RCTL_VFE;
 
-       if (hw.mac.type < igb_mac_min) {
+       if (hw->mac.type < igb_mac_min) {
                if (adapter->rx_mbuf_sz == MCLBYTES)
                        rctl |= E1000_RCTL_SZ_2048;
                else if (adapter->rx_mbuf_sz == MJUMPAGESIZE)
@@ -3854,7 +3854,7 @@ em_enable_phy_wakeup(struct adapter *adapter)
        e1000_copy_rx_addrs_to_phy_ich8lan(hw);
 
        /* copy MAC MTA to PHY MTA */
-       for (int i = 0; i < hw.mac.mta_reg_count; i++) {
+       for (int i = 0; i < hw->mac.mta_reg_count; i++) {
                mreg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
                e1000_write_phy_reg(hw, BM_MTA(i), (u16)(mreg & 0xFFFF));
                e1000_write_phy_reg(hw, BM_MTA(i) + 1,
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