The branch main has been updated by ssaxena:
URL:
https://cgit.FreeBSD.org/src/commit/?id=3012fa8faef262c615672fc90319c777b4e3dffc
commit 3012fa8faef262c615672fc90319c777b4e3dffc
Author: Chandrakanth patil <chandrakanth.pa...@broadcom.com>
AuthorDate: 2024-03-19 06:56:44 +0000
Commit: Sumit Saxena <ssax...@freebsd.org>
CommitDate: 2024-06-06 10:39:15 +0000
mpi3mr: Adding FreeBSD OS Type to Fault/Reset Reason Code
The driver is modified to add FreeBSD OS type in the upper nibble of the
fault/reset reason code for appropriate qualification of the reason code.
Reviewed by: imp
Approved by: imp
Differential revision: https://reviews.freebsd.org/D44427
---
sys/dev/mpi3mr/mpi3mr.c | 29 +++++++++++++++++++----------
sys/dev/mpi3mr/mpi3mr.h | 7 +++++--
sys/dev/mpi3mr/mpi3mr_cam.c | 2 +-
3 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/sys/dev/mpi3mr/mpi3mr.c b/sys/dev/mpi3mr/mpi3mr.c
index 916829f4a38f..c592d5734d38 100644
--- a/sys/dev/mpi3mr/mpi3mr.c
+++ b/sys/dev/mpi3mr/mpi3mr.c
@@ -83,7 +83,7 @@ static void mpi3mr_port_enable_complete(struct mpi3mr_softc
*sc,
struct mpi3mr_drvr_cmd *drvrcmd);
static void mpi3mr_flush_io(struct mpi3mr_softc *sc);
static int mpi3mr_issue_reset(struct mpi3mr_softc *sc, U16 reset_type,
- U32 reset_reason);
+ U16 reset_reason);
static void mpi3mr_dev_rmhs_send_tm(struct mpi3mr_softc *sc, U16 handle,
struct mpi3mr_drvr_cmd *cmdparam, U8 iou_rc);
static void mpi3mr_dev_rmhs_complete_iou(struct mpi3mr_softc *sc,
@@ -186,7 +186,7 @@ poll_for_command_completion(struct mpi3mr_softc *sc,
* Return: None.
*/
static void
-mpi3mr_trigger_snapdump(struct mpi3mr_softc *sc, U32 reason_code)
+mpi3mr_trigger_snapdump(struct mpi3mr_softc *sc, U16 reason_code)
{
U32 host_diagnostic, timeout = MPI3_SYSIF_DIAG_SAVE_TIMEOUT * 10;
@@ -221,7 +221,7 @@ mpi3mr_trigger_snapdump(struct mpi3mr_softc *sc, U32
reason_code)
*
* Return: None.
*/
-static void mpi3mr_check_rh_fault_ioc(struct mpi3mr_softc *sc, U32 reason_code)
+static void mpi3mr_check_rh_fault_ioc(struct mpi3mr_softc *sc, U16 reason_code)
{
U32 ioc_status;
@@ -1167,9 +1167,9 @@ static inline void mpi3mr_clear_resethistory(struct
mpi3mr_softc *sc)
*
* Return: 0 on success, -1 on failure.
*/
-static int mpi3mr_mur_ioc(struct mpi3mr_softc *sc, U32 reset_reason)
+static int mpi3mr_mur_ioc(struct mpi3mr_softc *sc, U16 reset_reason)
{
- U32 ioc_config, timeout, ioc_status;
+ U32 ioc_config, timeout, ioc_status, scratch_pad0;
int retval = -1;
mpi3mr_dprint(sc, MPI3MR_INFO, "Issuing Message Unit Reset(MUR)\n");
@@ -1178,7 +1178,12 @@ static int mpi3mr_mur_ioc(struct mpi3mr_softc *sc, U32
reset_reason)
return retval;
}
mpi3mr_clear_resethistory(sc);
- mpi3mr_regwrite(sc, MPI3_SYSIF_SCRATCHPAD0_OFFSET, reset_reason);
+
+ scratch_pad0 = ((MPI3MR_RESET_REASON_OSTYPE_FREEBSD <<
+ MPI3MR_RESET_REASON_OSTYPE_SHIFT) |
+ (sc->facts.ioc_num <<
+ MPI3MR_RESET_REASON_IOCNUM_SHIFT) | reset_reason);
+ mpi3mr_regwrite(sc, MPI3_SYSIF_SCRATCHPAD0_OFFSET, scratch_pad0);
ioc_config = mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET);
ioc_config &= ~MPI3_SYSIF_IOC_CONFIG_ENABLE_IOC;
mpi3mr_regwrite(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET, ioc_config);
@@ -5761,11 +5766,11 @@ static inline void mpi3mr_set_diagsave(struct
mpi3mr_softc *sc)
* Return: 0 on success, non-zero on failure.
*/
static int mpi3mr_issue_reset(struct mpi3mr_softc *sc, U16 reset_type,
- U32 reset_reason)
+ U16 reset_reason)
{
int retval = -1;
U8 unlock_retry_count = 0;
- U32 host_diagnostic, ioc_status, ioc_config;
+ U32 host_diagnostic, ioc_status, ioc_config, scratch_pad0;
U32 timeout = MPI3MR_RESET_ACK_TIMEOUT * 10;
if ((reset_type != MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET) &&
@@ -5819,7 +5824,11 @@ static int mpi3mr_issue_reset(struct mpi3mr_softc *sc,
U16 reset_type,
unlock_retry_count, host_diagnostic);
} while (!(host_diagnostic & MPI3_SYSIF_HOST_DIAG_DIAG_WRITE_ENABLE));
- mpi3mr_regwrite(sc, MPI3_SYSIF_SCRATCHPAD0_OFFSET, reset_reason);
+ scratch_pad0 = ((MPI3MR_RESET_REASON_OSTYPE_FREEBSD <<
+ MPI3MR_RESET_REASON_OSTYPE_SHIFT) |
+ (sc->facts.ioc_num <<
+ MPI3MR_RESET_REASON_IOCNUM_SHIFT) | reset_reason);
+ mpi3mr_regwrite(sc, MPI3_SYSIF_SCRATCHPAD0_OFFSET, scratch_pad0);
mpi3mr_regwrite(sc, MPI3_SYSIF_HOST_DIAG_OFFSET, host_diagnostic |
reset_type);
if (reset_type == MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET) {
@@ -5898,7 +5907,7 @@ inline void mpi3mr_cleanup_event_taskq(struct
mpi3mr_softc *sc)
* Return: 0 on success, non-zero on failure.
*/
int mpi3mr_soft_reset_handler(struct mpi3mr_softc *sc,
- U32 reset_reason, bool snapdump)
+ U16 reset_reason, bool snapdump)
{
int retval = 0, i = 0;
enum mpi3mr_iocstate ioc_state;
diff --git a/sys/dev/mpi3mr/mpi3mr.h b/sys/dev/mpi3mr/mpi3mr.h
index f8f562184aae..f61c5b377b46 100644
--- a/sys/dev/mpi3mr/mpi3mr.h
+++ b/sys/dev/mpi3mr/mpi3mr.h
@@ -141,6 +141,9 @@
#define MAX_MGMT_ADAPTERS 8
#define MPI3MR_WAIT_BEFORE_CTRL_RESET 5
+#define MPI3MR_RESET_REASON_OSTYPE_FREEBSD 0x4
+#define MPI3MR_RESET_REASON_OSTYPE_SHIFT 28
+#define MPI3MR_RESET_REASON_IOCNUM_SHIFT 20
struct mpi3mr_mgmt_info {
uint16_t count;
@@ -961,7 +964,7 @@ void mpi3mr_cleanup_event_taskq(struct mpi3mr_softc *sc);
void
mpi3mr_hexdump(void *buf, int sz, int format);
int mpi3mr_soft_reset_handler(struct mpi3mr_softc *sc,
- U32 reset_reason, bool snapdump);
+ U16 reset_reason, bool snapdump);
void
mpi3mrsas_release_simq_reinit(struct mpi3mr_cam_softc *cam_sc);
void
@@ -983,6 +986,6 @@ void mpi3mr_set_io_divert_for_all_vd_in_tg(struct
mpi3mr_softc *sc,
enum mpi3mr_iocstate mpi3mr_get_iocstate(struct mpi3mr_softc *sc);
void mpi3mr_poll_pend_io_completions(struct mpi3mr_softc *sc);
void int_to_lun(unsigned int lun, U8 *req_lun);
-void trigger_reset_from_watchdog(struct mpi3mr_softc *sc, U8 reset_type, U32
reset_reason);
+void trigger_reset_from_watchdog(struct mpi3mr_softc *sc, U8 reset_type, U16
reset_reason);
void mpi3mr_alloc_ioctl_dma_memory(struct mpi3mr_softc *sc);
#endif /*MPI3MR_H_INCLUDED*/
diff --git a/sys/dev/mpi3mr/mpi3mr_cam.c b/sys/dev/mpi3mr/mpi3mr_cam.c
index 4843aa6ea721..da6342063e87 100644
--- a/sys/dev/mpi3mr/mpi3mr_cam.c
+++ b/sys/dev/mpi3mr/mpi3mr_cam.c
@@ -454,7 +454,7 @@ void mpi3mr_poll_pend_io_completions(struct mpi3mr_softc
*sc)
}
void
-trigger_reset_from_watchdog(struct mpi3mr_softc *sc, U8 reset_type, U32
reset_reason)
+trigger_reset_from_watchdog(struct mpi3mr_softc *sc, U8 reset_type, U16
reset_reason)
{
if (sc->reset_in_progress) {
mpi3mr_dprint(sc, MPI3MR_INFO, "Another reset is in progress,
no need to trigger the reset\n");
