The branch main has been updated by adrian:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=081d3ab24e03d271a0de3b173802fbe71f52e8aa

commit 081d3ab24e03d271a0de3b173802fbe71f52e8aa
Author:     Abdelkader Boudih <[email protected]>
AuthorDate: 2026-05-05 23:59:10 +0000
Commit:     Adrian Chadd <[email protected]>
CommitDate: 2026-05-06 01:31:48 +0000

    ichsmb: add Ice Lake-LP (0x34a3) and Ice Lake-N (0x38a3) SMBus device IDs
    
    Add PCI device IDs for two Ice Lake PCH SMBus controller variants:
    - 0x34a3 (Ice Lake-LP), previously listed as the generic "Ice Lake" entry 
(ID_ICELAKE), renamed to ID_ICELAKELP for clarity.
    - 0x38a3 (Ice Lake-N), a separate PCH variant not previously supported.
    
    Reviewed by:    adrian
    Differential Revision:  https://reviews.freebsd.org/D56732
---
 sys/dev/ichsmb/ichsmb_pci.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/sys/dev/ichsmb/ichsmb_pci.c b/sys/dev/ichsmb/ichsmb_pci.c
index af3e0f004b88..7f9409e4452c 100644
--- a/sys/dev/ichsmb/ichsmb_pci.c
+++ b/sys/dev/ichsmb/ichsmb_pci.c
@@ -110,7 +110,8 @@
 #define        ID_ELKHARTLAKE                  0x4b23
 #define        ID_GEMINILAKE                   0x31d4
 #define        ID_CEDARFORK                    0x18df
-#define        ID_ICELAKE                      0x34a3
+#define        ID_ICELAKELP                    0x34a3
+#define        ID_ICELAKEN                     0x38a3
 #define        ID_ALDERLAKE                    0x7aa3
 #define        ID_ALDERLAKE2                   0x51a3
 #define        ID_ALDERLAKE3                   0x54a3
@@ -255,8 +256,10 @@ static const struct pci_device_table ichsmb_devices[] = {
          PCI_DESCR("Intel Gemini Lake SMBus controller") },
        { PCI_DEV(PCI_VENDOR_INTEL, ID_CEDARFORK),
          PCI_DESCR("Intel Cedar Fork SMBus controller") },
-       { PCI_DEV(PCI_VENDOR_INTEL, ID_ICELAKE),
-         PCI_DESCR("Intel Ice Lake SMBus controller") },
+       { PCI_DEV(PCI_VENDOR_INTEL, ID_ICELAKELP),
+         PCI_DESCR("Intel Ice Lake-LP SMBus controller") },
+       { PCI_DEV(PCI_VENDOR_INTEL, ID_ICELAKEN),
+         PCI_DESCR("Intel Ice Lake-N SMBus controller") },
        { PCI_DEV(PCI_VENDOR_INTEL, ID_ALDERLAKE),
          .driver_data = (uintptr_t)ICHSMB_FEATURE_BLOCK_BUFFER,
          PCI_DESCR("Intel Alder Lake SMBus controller") },

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