> -----Original Message-----
> From: Neil Horman [mailto:nhorman at tuxdriver.com]
> Sent: Wednesday, November 19, 2014 3:06 PM
> To: Ananyev, Konstantin
> Cc: Richardson, Bruce; dev at dpdk.org
> Subject: Re: [dpdk-dev] [PATCH v4 3/5] hash: add fallback to software CRC32
> implementation
>
> On Wed, Nov 19, 2014 at 11:50:40AM +0000, Ananyev, Konstantin wrote:
> >
> >
> > > -----Original Message-----
> > > From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Bruce Richardson
> > > Sent: Wednesday, November 19, 2014 11:38 AM
> > > To: Neil Horman
> > > Cc: dev at dpdk.org
> > > Subject: Re: [dpdk-dev] [PATCH v4 3/5] hash: add fallback to software
> > > CRC32 implementation
> > >
> > > On Wed, Nov 19, 2014 at 06:34:08AM -0500, Neil Horman wrote:
> > > > On Wed, Nov 19, 2014 at 10:16:14AM +0000, Bruce Richardson wrote:
> > > > > On Tue, Nov 18, 2014 at 04:36:24PM -0500, Neil Horman wrote:
> > > > > > On Tue, Nov 18, 2014 at 05:52:27PM +0000, Bruce Richardson wrote:
> > > > > > > On Tue, Nov 18, 2014 at 12:46:19PM -0500, Neil Horman wrote:
> > > > > > > > On Tue, Nov 18, 2014 at 11:13:17PM +0600, Yerden Zhumabekov
> > > > > > > > wrote:
> > > > > > > > >
> > > > > > > > > 18.11.2014 22:00, Neil Horman ?????:
> > > > > > > > > > On Tue, Nov 18, 2014 at 09:06:35PM +0600, Yerden Zhumabekov
> > > > > > > > > > wrote:
> > > > > > > > > >> 18.11.2014 20:41, Neil Horman ?????:
> > > > > > > > > >>> On Tue, Nov 18, 2014 at 08:03:40PM +0600, Yerden
> > > > > > > > > >>> Zhumabekov wrote:
> > > > > > > > > >>>> /**
> > > > > > > > > >>>> * Use single crc32 instruction to perform a hash on a
> > > > > > > > > >>>> 4 byte value.
> > > > > > > > > >>>> + * Fall back to software crc32 implementation in case
> > > > > > > > > >>>> SSE4.2 is
> > > > > > > > > >>>> + * not supported
> > > > > > > > > >>>> *
> > > > > > > > > >>>> * @param data
> > > > > > > > > >>>> * Data to perform hash on.
> > > > > > > > > >>>> @@ -376,11 +413,18 @@ crc32c_2words(uint64_t data,
> > > > > > > > > >>>> uint32_t init_val)
> > > > > > > > > >>>> static inline uint32_t
> > > > > > > > > >>>> rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
> > > > > > > > > >>>> {
> > > > > > > > > >>>> - return _mm_crc32_u32(init_val, data);
> > > > > > > > > >>>> +#ifdef RTE_MACHINE_CPUFLAG_SSE4_2
> > > > > > > > > >>>> + if (likely(crc32_alg == CRC32_SSE42))
> > > > > > > > > >>>> + return _mm_crc32_u32(init_val, data);
> > > > > > > > > >>>> +#endif
> > > > > > > > > >>> you don't really need these ifdefs here anymore given
> > > > > > > > > >>> that you have a
> > > > > > > > > >>> constructor to do the algorithm selection. In fact you
> > > > > > > > > >>> need to remove them, in
> > > > > > > > > >>> the event you build on a system that doesn't support
> > > > > > > > > >>> SSE42, but run on a system
> > > > > > > > > >>> that does.
> > > > > > > > > >> Originally, I thought so as well. I wrote the code without
> > > > > > > > > >> these ifdefs,
> > > > > > > > > >> but it didn't compile on my machine which doesn't support
> > > > > > > > > >> SSE4.2. Error
> > > > > > > > > >> was triggered by nmmintrin.h which has a check for
> > > > > > > > > >> respective GCC
> > > > > > > > > >> extension. So I think these ifdefs are indeed required.
> > > > > > > > > >>
> > > > > > > > > > You need to edit the makefile so that the compiler gets
> > > > > > > > > > passed the option
> > > > > > > > > > -msse42. That way it will know to emit sse42 instructions.
> > > > > > > > > > It will also allow
> > > > > > > > > > you to remove the ifdef from the include file
> > > > > > > > >
> > > > > > > > > In this case, I guess there are two options:
> > > > > > > > > 1) modify all makefiles which use librte_hash
> > > > > > > > > 2) move all function bodies from rte_hash_crc.h to separate
> > > > > > > > > module,
> > > > > > > > > leaving prototype definitions there only.
> > > > > > > > >
> > > > > > > > > Everybody's up for the second option? :)
> > > > > > > > >
> > > > > > > > Crud, you're right, I didn't think about the header inclusion
> > > > > > > > issue. Is it
> > > > > > > > worth adding the jump to enable the dynamic hash selection?
> > > > > > > > Neil
> > > > > > >
> > > > > > > Maybe for cases where SSE4.2 is not currently available, i.e. for
> > > > > > > generic builds.
> > > > > > > For builds where we have hardware support confirmed at compile
> > > > > > > time, just use
> > > > > > > the function from the header file.
> > > > > > > Does that make sense?
> > > > > > >
> > > > > > I'm not certain of that, as I don't think anything can be
> > > > > > 'confirmed' at compile
> > > > > > time. I.e. just because you have sse42 at compile time doesn't
> > > > > > guarantee you
> > > > > > have it at run time with a DSO. If you have these as macros, you
> > > > > > need to enable
> > > > > > sse42 whereever you include the file so that the intrinsic works
> > > > > > properly.
> > > > >
> > > > > Well, if you compile with sse42 at compile time, the compiler is free
> > > > > to insert
> > > > > sse4 instructions at any place it feels like, irrespective of whether
> > > > > or not you
> > > > > use SSE4 intrinsics, so I would never expect such a DSO to work on a
> > > > > system
> > > > > without SSE42 support.
> > > > >
> > > > > >
> > > > > > an alternate option would be to not use the intrinsic, and craft
> > > > > > some explicit
> > > > > > __asm__ statement that executes the right sse42 instructions. That
> > > > > > way the asm
> > > > > > is directly emitted, without requiring the -msse42 flag at all, and
> > > > > > it will just
> > > > > > work in all the files that call it.
> > > > > >
> > > > >
> > > > > I really don't like that approach. I think using intrinsics is much
> > > > > more
> > > > > maintainable.
> > > > >
> > > > I grant you that using an intrinsic is easier to read, but if the code
> > > > doesn't
> > > > compile when using the intrinsic unless you have sse42 turned on, I'm
> > > > not sure
> > > > what choice we have. and inline asm isn't that hard to maintain.
> > > > We're talking
> > > > about three lines of code:
> > > > asm(
> > > > "mov %[1],%eax
> > > > mov %[2],%edx
> > > > crc32l %edx,%eax":
> > > > [edx] "r" (crc) /*output*/
> > > > :
> > > > [1] "r" (crc), /* input */
> > > > [2] "r" (val)
> > > > :
> > > > [eax] "r" /* clobber */
> > > > )
> > > >
> > > > I don't have the syntax quite right, but its pretty easy to read the
> > > > intent.
> > > > Its not like we dont have precidence for this, the atomic interface and
> > > > several
> > > > pmds do this frequently.
> > > >
> > > > Neil
> > >
> > > Fair point. If everyone else is happy enough with it, I'm ok too.
> >
> > As I remember with gcc & icc it is possible to specify tht you'd like to
> > compile that particular function
> > for different target.
> > From https://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html:
> > "target
> > The target attribute is used to specify that a function is to be compiled
> > with different target options than specified on the command
> line. This can be used for instance to have functions compiled with a
> different ISA (instruction set architecture) than the default. You
> can also use the ?#pragma GCC target? pragma to set more than one function to
> be compiled with specific target options. See
> Function Specific Option Pragmas, for details about the ?#pragma GCC target?
> pragma.
> > For instance on a 386, you could compile one function with
> > target("sse4.1,arch=core2") and another with
> target("sse4a,arch=amdfam10"). This is equivalent to compiling the first
> function with -msse4.1 and -march=core2 options, and the
> second function with -msse4a and -march=amdfam10 options. It is up to the
> user to make sure that a function is only invoked on a
> machine that supports the particular ISA it is compiled for (for example by
> using cpuid on 386 to determine what feature bits and
> architecture family are used).
> >
> > int core2_func (void) __attribute__ ((__target__ ("arch=core2")));
> > int sse3_func (void) __attribute__ ((__target__ ("sse3")));
> > You can either use multiple strings to specify multiple options, or
> > separate the options with a comma (?,?).
> >
> > The target attribute is presently implemented for i386/x86_64, PowerPC, and
> > Nios II targets only. The options supported are specific
> to each target.
> >
> > On the 386, the following options are allowed:
> > ...
> > ?sse4.2?
> > ?no-sse4.2?"
> >
> > Wouldn't that suit your purposes?
> > Probably you can even keep your function inline with that approach.
> >
> That would definately work, and be a great solution in this case. However,
> its
> limited to only the most recent version of gcc. If thats an acceptible
> constraint on the DPDK, then its ok, but distributions are only starting to
> include that version now. Not sure of the icc status of that attribute.
Yes, as I can see that feature was introduced in gcc 4.4, and we have to
support backward to gcc 4.3...
Though I suppose for gcc 4.3 , we can just always switch to the scalar version,
can't we?
Something like that:
$ cat ./tatrg1.c
#include <stdint.h>
uint64_t
ffx1_gen(uint64_t x)
{
/* should contain scalar CRC implementation. */
return (x * x);
}
#pragma GCC target ("sse4.2")
#if defined __SSE4_2__
#include <smmintrin.h>
uint64_t
ffx1_sse42(uint64_t x)
{
return _mm_crc32_u64(x, x);
}
#else
uint64_t
ffx1_sse42(uint64_t x)
{
/* should contain scalar CRC implementation. */
return (x * x);
}
#endif
Konstantin
>
> Neil
>
> > Konstantin
> >
> >
> > >
> > > /Bruce
